[llvm] 1ccebb1 - [GlobalISel] Micro-optimize the conditional branch optimization.
Amara Emerson via llvm-commits
llvm-commits at lists.llvm.org
Fri May 7 00:23:51 PDT 2021
Author: Amara Emerson
Date: 2021-05-07T00:03:09-07:00
New Revision: 1ccebb18ef9f4110e555209261d73dbec393e364
URL: https://github.com/llvm/llvm-project/commit/1ccebb18ef9f4110e555209261d73dbec393e364
DIFF: https://github.com/llvm/llvm-project/commit/1ccebb18ef9f4110e555209261d73dbec393e364.diff
LOG: [GlobalISel] Micro-optimize the conditional branch optimization.
Convert a check into an assert and pass an MI instead of recomputing in the
apply function.
Added:
Modified:
llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
llvm/include/llvm/Target/GlobalISel/Combine.td
llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h b/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
index 06bbeeb88ec13..f93193093ae28 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
@@ -163,8 +163,8 @@ class CombinerHelper {
/// If a brcond's true block is not the fallthrough, make it so by inverting
/// the condition and swapping operands.
- bool matchOptBrCondByInvertingCond(MachineInstr &MI);
- void applyOptBrCondByInvertingCond(MachineInstr &MI);
+ bool matchOptBrCondByInvertingCond(MachineInstr &MI, MachineInstr *&BrCond);
+ void applyOptBrCondByInvertingCond(MachineInstr &MI, MachineInstr *&BrCond);
/// If \p MI is G_CONCAT_VECTORS, try to combine it.
/// Returns true if MI changed.
diff --git a/llvm/include/llvm/Target/GlobalISel/Combine.td b/llvm/include/llvm/Target/GlobalISel/Combine.td
index a63b9b8548bfc..a8c64e0be6bd9 100644
--- a/llvm/include/llvm/Target/GlobalISel/Combine.td
+++ b/llvm/include/llvm/Target/GlobalISel/Combine.td
@@ -149,11 +149,12 @@ def combine_indexed_load_store : GICombineRule<
[{ return Helper.matchCombineIndexedLoadStore(*${root}, ${matchinfo}); }]),
(apply [{ Helper.applyCombineIndexedLoadStore(*${root}, ${matchinfo}); }])>;
+def opt_brcond_by_inverting_cond_matchdata : GIDefMatchData<"MachineInstr *">;
def opt_brcond_by_inverting_cond : GICombineRule<
- (defs root:$root),
+ (defs root:$root, opt_brcond_by_inverting_cond_matchdata:$matchinfo),
(match (wip_match_opcode G_BR):$root,
- [{ return Helper.matchOptBrCondByInvertingCond(*${root}); }]),
- (apply [{ Helper.applyOptBrCondByInvertingCond(*${root}); }])>;
+ [{ return Helper.matchOptBrCondByInvertingCond(*${root}, ${matchinfo}); }]),
+ (apply [{ Helper.applyOptBrCondByInvertingCond(*${root}, ${matchinfo}); }])>;
def ptr_add_immed_matchdata : GIDefMatchData<"PtrAddChain">;
def ptr_add_immed_chain : GICombineRule<
diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
index e3af0c43bbcad..c4678f68a6096 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -1033,9 +1033,9 @@ void CombinerHelper::applyCombineDivRem(MachineInstr &MI,
OtherMI->eraseFromParent();
}
-bool CombinerHelper::matchOptBrCondByInvertingCond(MachineInstr &MI) {
- if (MI.getOpcode() != TargetOpcode::G_BR)
- return false;
+bool CombinerHelper::matchOptBrCondByInvertingCond(MachineInstr &MI,
+ MachineInstr *&BrCond) {
+ assert(MI.getOpcode() == TargetOpcode::G_BR);
// Try to match the following:
// bb1:
@@ -1056,7 +1056,7 @@ bool CombinerHelper::matchOptBrCondByInvertingCond(MachineInstr &MI) {
return false;
assert(std::next(BrIt) == MBB->end() && "expected G_BR to be a terminator");
- MachineInstr *BrCond = &*std::prev(BrIt);
+ BrCond = &*std::prev(BrIt);
if (BrCond->getOpcode() != TargetOpcode::G_BRCOND)
return false;
@@ -1067,11 +1067,9 @@ bool CombinerHelper::matchOptBrCondByInvertingCond(MachineInstr &MI) {
MBB->isLayoutSuccessor(BrCondTarget);
}
-void CombinerHelper::applyOptBrCondByInvertingCond(MachineInstr &MI) {
+void CombinerHelper::applyOptBrCondByInvertingCond(MachineInstr &MI,
+ MachineInstr *&BrCond) {
MachineBasicBlock *BrTarget = MI.getOperand(0).getMBB();
- MachineBasicBlock::iterator BrIt(MI);
- MachineInstr *BrCond = &*std::prev(BrIt);
-
Builder.setInstrAndDebugLoc(*BrCond);
LLT Ty = MRI.getType(BrCond->getOperand(0).getReg());
// FIXME: Does int/fp matter for this? If so, we might need to restrict
More information about the llvm-commits
mailing list