[llvm] 9e02627 - [AMDGPU] SIInsertHardClauses: move more stuff into the class. NFC.

[Jay Foad via llvm-commits]

Author: Jay Foad
Date: 2021-05-06T14:47:54+01:00
New Revision: 9e026273b030d77b5429e31fd2d7ce3ca6b68cd8

URL: https://github.com/llvm/llvm-project/commit/9e026273b030d77b5429e31fd2d7ce3ca6b68cd8
DIFF: https://github.com/llvm/llvm-project/commit/9e026273b030d77b5429e31fd2d7ce3ca6b68cd8.diff

LOG: [AMDGPU] SIInsertHardClauses: move more stuff into the class. NFC.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp b/llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp
index 5611c9c5d57e..e778f59e93bf 100644
--- a/llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp
@@ -63,30 +63,10 @@ enum HardClauseType {
   HARDCLAUSE_ILLEGAL,
 };
 
-HardClauseType getHardClauseType(const MachineInstr &MI) {
-  // On current architectures we only get a benefit from clausing loads.
-  if (MI.mayLoad()) {
-    if (SIInstrInfo::isVMEM(MI) || SIInstrInfo::isSegmentSpecificFLAT(MI))
-      return HARDCLAUSE_VMEM;
-    if (SIInstrInfo::isFLAT(MI))
-      return HARDCLAUSE_FLAT;
-    // TODO: LDS
-    if (SIInstrInfo::isSMRD(MI))
-      return HARDCLAUSE_SMEM;
-  }
-
-  // Don't form VALU clauses. It's not clear what benefit they give, if any.
-
-  // In practice s_nop is the only internal instruction we're likely to see.
-  // It's safe to treat the rest as illegal.
-  if (MI.getOpcode() == AMDGPU::S_NOP)
-    return HARDCLAUSE_INTERNAL;
-  return HARDCLAUSE_ILLEGAL;
-}
-
 class SIInsertHardClauses : public MachineFunctionPass {
 public:
   static char ID;
+  const GCNSubtarget *ST = nullptr;
 
   SIInsertHardClauses() : MachineFunctionPass(ID) {}
 
@@ -95,6 +75,27 @@ class SIInsertHardClauses : public MachineFunctionPass {
     MachineFunctionPass::getAnalysisUsage(AU);
   }
 
+  HardClauseType getHardClauseType(const MachineInstr &MI) {
+    // On current architectures we only get a benefit from clausing loads.
+    if (MI.mayLoad()) {
+      if (SIInstrInfo::isVMEM(MI) || SIInstrInfo::isSegmentSpecificFLAT(MI))
+        return HARDCLAUSE_VMEM;
+      if (SIInstrInfo::isFLAT(MI))
+        return HARDCLAUSE_FLAT;
+      // TODO: LDS
+      if (SIInstrInfo::isSMRD(MI))
+        return HARDCLAUSE_SMEM;
+    }
+
+    // Don't form VALU clauses. It's not clear what benefit they give, if any.
+
+    // In practice s_nop is the only internal instruction we're likely to see.
+    // It's safe to treat the rest as illegal.
+    if (MI.getOpcode() == AMDGPU::S_NOP)
+      return HARDCLAUSE_INTERNAL;
+    return HARDCLAUSE_ILLEGAL;
+  }
+
   // Track information about a clause as we discover it.
   struct ClauseInfo {
     // The type of all (non-internal) instructions in the clause.
@@ -132,12 +133,12 @@ class SIInsertHardClauses : public MachineFunctionPass {
     if (skipFunction(MF.getFunction()))
       return false;
 
-    const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
-    if (!ST.hasHardClauses())
+    ST = &MF.getSubtarget<GCNSubtarget>();
+    if (!ST->hasHardClauses())
       return false;
 
-    const SIInstrInfo *SII = ST.getInstrInfo();
-    const TargetRegisterInfo *TRI = ST.getRegisterInfo();
+    const SIInstrInfo *SII = ST->getInstrInfo();
+    const TargetRegisterInfo *TRI = ST->getRegisterInfo();
 
     bool Changed = false;
     for (auto &MBB : MF) {