[PATCH] D101987: [DAG] Add a generic expansion for SHIFT_PARTS opcodes using funnel shifts

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu May 6 04:05:03 PDT 2021


RKSimon created this revision.
RKSimon added reviewers: efriedma, craig.topper, dmgreen, SjoerdMeijer, foad, arsenm, lebedev.ri.
Herald added subscribers: kerbowa, luismarques, steven.zhang, pengfei, s.egerton, PkmX, simoncook, hiraditya, kristof.beyls, tpr, nhaehnle, jvesely.
RKSimon requested review of this revision.
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Based off a discussion on D89281 <https://reviews.llvm.org/D89281> - where the aarch64 implementations were being replaced to use funnel shifts.

Any target that has efficient funnel shift lowering can handle the shift parts expansion using the same expansion, avoiding a lot of duplication.

I've generalized the x86 implementation and moved it to TargetLowering - so far I've found that aarch64 and amdgpu benefit, but many other targets (ARM, PowerPC + RISCV in particular) could easily use this with a few minor improvements to their funnel shift lowering (or the folding of their target ops that funnel shifts lower to).

NOTE: I'm trying to avoid adding full SHIFT_PARTS legalizer handling as I think it might actually be possible to remove these opcodes in the medium-term and use funnel shift / libcall expansion directly.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D101987

Files:
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
  llvm/lib/Target/AMDGPU/R600ISelLowering.h
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/test/CodeGen/AArch64/arm64-long-shift.ll
  llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
  llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
  llvm/test/CodeGen/AMDGPU/shl.ll
  llvm/test/CodeGen/AMDGPU/sra.ll
  llvm/test/CodeGen/AMDGPU/srl.ll

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