[PATCH] D100435: [ARM] Transforming memset to Tail predicated Loop

[Malhar via Phabricator via llvm-commits]

malharJ added inline comments.


================
Comment at: llvm/lib/Target/ARM/ARMISelLowering.cpp:11279
+    // fallthrough is the exit.
+    TpExit = BB->splitAt(MI);
     if (TpExit == BB) {
----------------
dmgreen wrote:
> Why has this changed from false to true?
> 
> What happens if CPSR is live across the MVE_MEMCPYLOOPINST?  WhileLoopStart and LoopEnd both clobber that physical register, incase they get reverted to subs; bne. Do we need to add the same clobber to these new MVE mem loop instructions?
Im a bit unclear on this, so I've still left this as **UpdateLiveIns=true** in the latest patchset.

Inside splitAt(), I can see this relevant piece of code where:
- LiveRegs.addLiveOuts() will add the live outs of the original block.
- The for-loop will add the liveins for any physical register uses by the instructions in the newly split block.

```
LivePhysRegs LiveRegs;
if (UpdateLiveIns) {
    ...
    LiveRegs.addLiveOuts(*this);
    for (auto I = rbegin(), E = Prev.getReverse(); I != E; ++I)
      LiveRegs.stepBackward(*I);
}

...

  if (UpdateLiveIns)
    addLiveIns(*SplitBB, LiveRegs);

```

The condition uses I != E (where E is the memcpy/set pseudo) ... so I suppose any liveness information
from it is not added ?  and in case it gets reverted and clobbers CPSR in a later pass, shouldn't that take care of updating the liveness information of successive blocks ?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100435/new/

https://reviews.llvm.org/D100435