[llvm] ba5c122 - RISSCV: clang-format RISC-V AsmParser (NFC)
Saleem Abdulrasool via llvm-commits
llvm-commits at lists.llvm.org
Wed May 5 10:16:49 PDT 2021
Author: Saleem Abdulrasool
Date: 2021-05-05T10:16:41-07:00
New Revision: ba5c122647c79586a6d060ca649e586feb7f57a0
URL: https://github.com/llvm/llvm-project/commit/ba5c122647c79586a6d060ca649e586feb7f57a0
DIFF: https://github.com/llvm/llvm-project/commit/ba5c122647c79586a6d060ca649e586feb7f57a0.diff
LOG: RISSCV: clang-format RISC-V AsmParser (NFC)
This corrects a few issues identified by `clang-format`. This is meant
to be preparation for a subsequent change.
Added:
Modified:
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index e96a4c0d2aed..b74571667c6b 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -528,8 +528,7 @@ struct RISCVOperand : public MCParsedAsmOperand {
RISCVMCExpr::VariantKind VK = RISCVMCExpr::VK_RISCV_None;
int64_t Imm;
bool IsConstantImm = evaluateConstantImm(getImm(), Imm, VK);
- return IsConstantImm && isInt<6>(Imm) &&
- VK == RISCVMCExpr::VK_RISCV_None;
+ return IsConstantImm && isInt<6>(Imm) && VK == RISCVMCExpr::VK_RISCV_None;
}
bool isSImm6NonZero() const {
@@ -841,10 +840,18 @@ struct RISCVOperand : public MCParsedAsmOperand {
switch (c) {
default:
llvm_unreachable("FenceArg must contain only [iorw]");
- case 'i': Imm |= RISCVFenceField::I; break;
- case 'o': Imm |= RISCVFenceField::O; break;
- case 'r': Imm |= RISCVFenceField::R; break;
- case 'w': Imm |= RISCVFenceField::W; break;
+ case 'i':
+ Imm |= RISCVFenceField::I;
+ break;
+ case 'o':
+ Imm |= RISCVFenceField::O;
+ break;
+ case 'r':
+ Imm |= RISCVFenceField::R;
+ break;
+ case 'w':
+ Imm |= RISCVFenceField::W;
+ break;
}
}
Inst.addOperand(MCOperand::createImm(Imm));
@@ -954,8 +961,8 @@ bool RISCVAsmParser::generateImmOutOfRangeError(
}
static std::string RISCVMnemonicSpellCheck(StringRef S,
- const FeatureBitset &FBS,
- unsigned VariantID = 0);
+ const FeatureBitset &FBS,
+ unsigned VariantID = 0);
bool RISCVAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
OperandVector &Operands,
@@ -965,9 +972,8 @@ bool RISCVAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
MCInst Inst;
FeatureBitset MissingFeatures;
- auto Result =
- MatchInstructionImpl(Operands, Inst, ErrorInfo, MissingFeatures,
- MatchingInlineAsm);
+ auto Result = MatchInstructionImpl(Operands, Inst, ErrorInfo, MissingFeatures,
+ MatchingInlineAsm);
switch (Result) {
default:
break;
@@ -990,8 +996,8 @@ bool RISCVAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
}
case Match_MnemonicFail: {
FeatureBitset FBS = ComputeAvailableFeatures(getSTI().getFeatureBits());
- std::string Suggestion = RISCVMnemonicSpellCheck(
- ((RISCVOperand &)*Operands[0]).getToken(), FBS);
+ std::string Suggestion =
+ RISCVMnemonicSpellCheck(((RISCVOperand &)*Operands[0]).getToken(), FBS);
return Error(IDLoc, "unrecognized instruction mnemonic" + Suggestion);
}
case Match_InvalidOperand: {
@@ -1014,10 +1020,10 @@ bool RISCVAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
if (Result > FIRST_TARGET_MATCH_RESULT_TY) {
SMLoc ErrorLoc = IDLoc;
if (ErrorInfo != ~0U && ErrorInfo >= Operands.size())
- return Error(ErrorLoc, "too few operands for instruction");
+ return Error(ErrorLoc, "too few operands for instruction");
}
- switch(Result) {
+ switch (Result) {
default:
break;
case Match_InvalidImmXLenLI:
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