[PATCH] D101898: [ARM] Prevent spilling between ldrex/strex pairs

[Tomas Matheson via Phabricator via llvm-commits]

tmatheson added inline comments.


================
Comment at: llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp:1582
             .addReg(DesiredReg, RegState::Kill);
-    if (!IsThumb)
-      MIB.addImm(0);
+    MIB.addImm(0); // A1/T2 rotate operand
     MIB.add(predOps(ARMCC::AL));
----------------
LemonBoy wrote:
> Nit, guard this line with `if (UxtOp == t2UXTB)` as already done for the ldrex/strex ops below.
All of the currently used variants (`t2UXTB`, `UXTB`, `t2UXTH`, `UXTH`) expect an immediate here, which is different from the strex/ldrex instructions of which only `t2STREX` and `t2STREX` accept an offset. So I don't think a guard is necessary.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D101898/new/

https://reviews.llvm.org/D101898