[PATCH] D101826: [RISCV][VP] Lower VP ISD nodes to RVV instructions

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td:531
 
-  // Handle vnot the same as the vnot.mm pseudoinstruction.
-  def : Pat<(mti.Mask (vnot VR:$rs)),
+  // Handle rvv_vnot the same as the vnot.mm pseudoinstruction.
+  def : Pat<(mti.Mask (rvv_vnot VR:$rs)),
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frasercrmck wrote:
> rogfer01 wrote:
> > Now that you're here: I'm not sure there is a `vnot.mm` (I fail to find it in the spec) I think this comment should have said `vmnot.m`, right?
> Good question. I wonder if it means the `vnot.v` pseudoinstruction which I see in the 0.10 spec.
I think it was supposed to be vmnot.m


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  https://reviews.llvm.org/D101826/new/

https://reviews.llvm.org/D101826