[PATCH] D101889: [RISCV][NFC] Don't need to create a new STI in RISCVAsmPrinter.
Zakk Chen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 5 03:19:41 PDT 2021
khchen created this revision.
khchen added reviewers: HsiangKai, simoncook.
Herald added subscribers: vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, johnrusso, rbar, asb, hiraditya.
khchen requested review of this revision.
Herald added subscribers: llvm-commits, MaskRay.
Herald added a project: LLVM.
RISCVAsmPrinter already has MCSubtargetInfo.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D101889
Files:
llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
Index: llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
+++ llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
@@ -193,16 +193,7 @@
void RISCVAsmPrinter::emitAttributes() {
RISCVTargetStreamer &RTS =
static_cast<RISCVTargetStreamer &>(*OutStreamer->getTargetStreamer());
-
- const Triple &TT = TM.getTargetTriple();
- StringRef CPU = TM.getTargetCPU();
- StringRef FS = TM.getTargetFeatureString();
- const RISCVTargetMachine &RTM = static_cast<const RISCVTargetMachine &>(TM);
- /* TuneCPU doesn't impact emission of ELF attributes, ELF attributes only
- care about arch related features, so we can set TuneCPU as CPU. */
- const RISCVSubtarget STI(TT, CPU, /*TuneCPU=*/CPU, FS, /*ABIName=*/"", RTM);
-
- RTS.emitTargetAttributes(STI);
+ RTS.emitTargetAttributes(*STI);
}
// Force static initialization.
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