[PATCH] D101875: [RISCV] Prefer to lower MC_GlobalAddress operands to .Lfoo$local

[Fangrui Song via Phabricator via llvm-commits]

MaskRay created this revision.
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Similar to X86 D73230 <https://reviews.llvm.org/D73230> and AArch64 D101872 <https://reviews.llvm.org/D101872>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D101875

Files:
  llvm/lib/Target/RISCV/RISCVMCInstLower.cpp
  llvm/test/CodeGen/RISCV/pic-models.ll


Index: llvm/test/CodeGen/RISCV/pic-models.ll
===================================================================
--- llvm/test/CodeGen/RISCV/pic-models.ll
+++ llvm/test/CodeGen/RISCV/pic-models.ll
@@ -13,6 +13,7 @@
 
 @external_var = external global i32
 @internal_var = internal global i32 42
+ at dsolocal_var = dso_local global i32 42
 
 
 ; external address
@@ -83,3 +84,37 @@
 entry:
   ret i32* @internal_var
 }
+
+; default visibility dso_local external linkage
+
+define i32* @f3() nounwind {
+; RV32-STATIC-LABEL: f3:
+; RV32-STATIC:       # %bb.0: # %entry
+; RV32-STATIC-NEXT:    lui a0, %hi(dsolocal_var)
+; RV32-STATIC-NEXT:    addi a0, a0, %lo(dsolocal_var)
+; RV32-STATIC-NEXT:    ret
+;
+; RV32-PIC-LABEL: f3:
+; RV32-PIC:       # %bb.0: # %entry
+; RV32-PIC-NEXT:  .LBB2_1: # %entry
+; RV32-PIC-NEXT:    # Label of block must be emitted
+; RV32-PIC-NEXT:    auipc a0, %pcrel_hi(.Ldsolocal_var$local)
+; RV32-PIC-NEXT:    addi a0, a0, %pcrel_lo(.LBB2_1)
+; RV32-PIC-NEXT:    ret
+;
+; RV64-STATIC-LABEL: f3:
+; RV64-STATIC:       # %bb.0: # %entry
+; RV64-STATIC-NEXT:    lui a0, %hi(dsolocal_var)
+; RV64-STATIC-NEXT:    addi a0, a0, %lo(dsolocal_var)
+; RV64-STATIC-NEXT:    ret
+;
+; RV64-PIC-LABEL: f3:
+; RV64-PIC:       # %bb.0: # %entry
+; RV64-PIC-NEXT:  .LBB2_1: # %entry
+; RV64-PIC-NEXT:    # Label of block must be emitted
+; RV64-PIC-NEXT:    auipc a0, %pcrel_hi(.Ldsolocal_var$local)
+; RV64-PIC-NEXT:    addi a0, a0, %pcrel_lo(.LBB2_1)
+; RV64-PIC-NEXT:    ret
+entry:
+  ret i32* @dsolocal_var
+}
Index: llvm/lib/Target/RISCV/RISCVMCInstLower.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVMCInstLower.cpp
+++ llvm/lib/Target/RISCV/RISCVMCInstLower.cpp
@@ -109,7 +109,7 @@
     MCOp = lowerSymbolOperand(MO, MO.getMBB()->getSymbol(), AP);
     break;
   case MachineOperand::MO_GlobalAddress:
-    MCOp = lowerSymbolOperand(MO, AP.getSymbol(MO.getGlobal()), AP);
+    MCOp = lowerSymbolOperand(MO, AP.getSymbolPreferLocal(*MO.getGlobal()), AP);
     break;
   case MachineOperand::MO_BlockAddress:
     MCOp = lowerSymbolOperand(


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