[PATCH] D101850: [WebAssembly] Set alignment to 1 for SIMD memory intrinsics

[Heejin Ahn via Phabricator via llvm-commits]

aheejin added a comment.

Sorry I'm not sure if I understand. The "expected alignment" for all those memory instructions is 1, regardless of the size of the element of the vectors? Can you elaborate on why the previous code is incorrect?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D101850/new/

https://reviews.llvm.org/D101850