[PATCH] D101414: [AMDGPU] Disable the scalar IR, SDWA and load store vectorizer passes at -O1

Baptiste Saleil via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue May 4 13:45:33 PDT 2021


This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG6a1760915719: [AMDGPU] Disable the scalar IR, SDWA and load store vectorizer passes at -O1 (authored by bsaleil).

Changed prior to commit:
  https://reviews.llvm.org/D101414?vs=342017&id=342855#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D101414/new/

https://reviews.llvm.org/D101414

Files:
  llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  llvm/test/CodeGen/AMDGPU/llc-pipeline.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D101414.342855.patch
Type: text/x-patch
Size: 69208 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210504/f94d4304/attachment-0001.bin>


More information about the llvm-commits mailing list