[PATCH] D101234: GlobalISel: Use DAG call lowering infrastructure in a more compatible way

[Amara Emerson via Phabricator via llvm-commits]

aemerson added inline comments.


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Comment at: llvm/lib/CodeGen/GlobalISel/CallLowering.cpp:1122
+
+  return (SrcTy.isPointer() && DstTy.isScalar()) ||
+         (DstTy.isScalar() && SrcTy.isPointer());
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arsenm wrote:
> paquette wrote:
> > Why is `SrcTy.isPointer() == DstTy.isPointer()` not allowed?
> The whole point of the function is to hack around using LLTs on top of the MVT infrastructure. One of these types is derived from an MVT and therefore can never be a pointer. If both were pointers, they would have to have the same address space to use a plain copy, and would be handled by the early exit for exact type match
I think because to cast between different pointer address spaces you need an explicit G_ADDRSPACE_CAST.


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Comment at: llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp:224
+  /// currently building on top of.
+  uint64_t getStackValueStoreSize(const CCValAssign &VA) const override {
+    const MVT ValVT = VA.getValVT();
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This is identical to the other override. Can you factor it out?


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Comment at: llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-reductions.ll:12-14
+  ; CHECK:   [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $q1
+  ; CHECK:   [[BITCAST:%[0-9]+]]:_(<4 x s32>) = G_BITCAST [[COPY1]](<2 x s64>)
+  ; CHECK:   [[VECREDUCE_SEQ_FADD:%[0-9]+]]:_(s32) = G_VECREDUCE_SEQ_FADD [[COPY]](s32), [[BITCAST]](<4 x s32>)
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Why is this changing?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D101234/new/

https://reviews.llvm.org/D101234