[PATCH] D99707: Remove "Rewrite Symbols" from codegen pipeline

Reid Kleckner via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue May 4 10:39:59 PDT 2021


rnk added inline comments.


================
Comment at: llvm/lib/Target/ARM/ARMTargetMachine.cpp:466
     addPass(createMVETailPredicationPass());
+    addPass(createBarrierNoopPass());
   }
----------------
aeubanks wrote:
> SjoerdMeijer wrote:
> > Thanks for adding us. I am unfamiliar with this BarriesNoopPass. @dmgreen, do you know more about this by any chance?
> typically if we have a bunch of function passes in a row, the pass manager will run all of them on one function, then the next function, etc
> by adding a module pass somewhere in the middle of the function passes, we'll end up running the first half of the function passes on each function, then the second half. this accomplishes what's mentioned in the description
> 
> e.g. if we have two functions f1 and f2, and four function passes FP1-4, normally it'd be
> FP1 on f1
> FP2 on f1
> FP3 on f1
> FP4 on f1
> FP1 on f2
> FP2 on f2
> FP3 on f2
> FP4 on f2
> 
> but with the barrier between FP2 and FP3, we get
> 
> FP1 on f1
> FP2 on f1
> FP1 on f2
> FP2 on f2
> barrier
> FP3 on f1
> FP4 on f1
> FP3 on f2
> FP4 on f2
I think this is a reasonable temporary solution, but please add a comment about what this is doing.

The module pass barrier ensures that we run all pre-ISel passes (IR passes) over all functions before starting instruction selection. IR passes can modify the CFG, which can delete address-taken basic blocks. That invalidates references to block addresses stored in the ARM constant pool. Maybe add `// FIXME: Solve this another way` or something like that.


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  https://reviews.llvm.org/D99707/new/

https://reviews.llvm.org/D99707



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