[llvm] 18883a3 - [TTI] Replace ceil lambdas with divideCeil. NFCI
David Green via llvm-commits
llvm-commits at lists.llvm.org
Tue May 4 01:04:57 PDT 2021
Author: David Green
Date: 2021-05-04T09:04:44+01:00
New Revision: 18883a3fec5a153ab64fb756f6c7f92bce9f9283
URL: https://github.com/llvm/llvm-project/commit/18883a3fec5a153ab64fb756f6c7f92bce9f9283
DIFF: https://github.com/llvm/llvm-project/commit/18883a3fec5a153ab64fb756f6c7f92bce9f9283.diff
LOG: [TTI] Replace ceil lambdas with divideCeil. NFCI
As pointed out in D101726, this function already exists in MathExtras.
It uses different types, but with the values used here I believe that
should not make a functional difference.
Added:
Modified:
llvm/include/llvm/CodeGen/BasicTTIImpl.h
llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/BasicTTIImpl.h b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
index 28d46922844db..dbd3d6cb9a7b2 100644
--- a/llvm/include/llvm/CodeGen/BasicTTIImpl.h
+++ b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
@@ -1154,9 +1154,6 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
unsigned VecTySize = thisT()->getDataLayout().getTypeStoreSize(VecTy);
unsigned VecTyLTSize = VecTyLT.getStoreSize();
- // Return the ceiling of dividing A by B.
- auto ceil = [](unsigned A, unsigned B) { return (A + B - 1) / B; };
-
// Scale the cost of the memory operation by the fraction of legalized
// instructions that will actually be used. We shouldn't account for the
// cost of dead instructions since they will be removed.
@@ -1174,11 +1171,11 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
if (Opcode == Instruction::Load && VecTySize > VecTyLTSize) {
// The number of loads of a legal type it will take to represent a load
// of the unlegalized vector type.
- unsigned NumLegalInsts = ceil(VecTySize, VecTyLTSize);
+ unsigned NumLegalInsts = divideCeil(VecTySize, VecTyLTSize);
// The number of elements of the unlegalized type that correspond to a
// single legal instruction.
- unsigned NumEltsPerLegalInst = ceil(NumElts, NumLegalInsts);
+ unsigned NumEltsPerLegalInst = divideCeil(NumElts, NumLegalInsts);
// Determine which legal instructions will be used.
BitVector UsedInsts(NumLegalInsts, false);
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
index f405a3eb419fd..03c4da8495ab2 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
@@ -1145,9 +1145,6 @@ InstructionCost SystemZTTIImpl::getInterleavedMemoryOpCost(
assert(isa<VectorType>(VecTy) &&
"Expect a vector type for interleaved memory op");
- // Return the ceiling of dividing A by B.
- auto ceil = [](unsigned A, unsigned B) { return (A + B - 1) / B; };
-
unsigned NumElts = cast<FixedVectorType>(VecTy)->getNumElements();
assert(Factor > 1 && NumElts % Factor == 0 && "Invalid interleave factor");
unsigned VF = NumElts / Factor;
@@ -1174,7 +1171,7 @@ InstructionCost SystemZTTIImpl::getInterleavedMemoryOpCost(
// requires one operation, except that vperm can handle two input
// registers first time for each dst vector.
unsigned NumSrcVecs = ValueVecs[Index].count();
- unsigned NumDstVecs = ceil(VF * getScalarSizeInBits(VecTy), 128U);
+ unsigned NumDstVecs = divideCeil(VF * getScalarSizeInBits(VecTy), 128U);
assert (NumSrcVecs >= NumDstVecs && "Expected at least as many sources");
NumPermutes += std::max(1U, NumSrcVecs - NumDstVecs);
}
More information about the llvm-commits
mailing list