[PATCH] D100050: [AIX] Remove unused vector registers from allocation order in the default AltiVec ABI

[Zarko Todorovski via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGd98e5e02adb5: [AIX] Remove unused vector registers from allocation order in the default… (authored by ZarkoCA).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100050/new/

https://reviews.llvm.org/D100050

Files:
  llvm/lib/Target/PowerPC/PPCCallingConv.td
  llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
  llvm/test/CodeGen/PowerPC/aix-dfltabi-rsrvd-reg.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D100050.342465.patch
Type: text/x-patch
Size: 9332 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210503/db39bc75/attachment.bin>