[llvm] 761d561 - [Object] Fix e_machine description for EM_CR16 and add EM_MICROBLAZE
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Sun May 2 19:25:44 PDT 2021
Author: Sergio Perez Gonzalez
Date: 2021-05-02T19:25:39-07:00
New Revision: 761d5614a18c1046452ec8cbc773f534fccb2e6f
URL: https://github.com/llvm/llvm-project/commit/761d5614a18c1046452ec8cbc773f534fccb2e6f
DIFF: https://github.com/llvm/llvm-project/commit/761d5614a18c1046452ec8cbc773f534fccb2e6f.diff
LOG: [Object] Fix e_machine description for EM_CR16 and add EM_MICROBLAZE
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D101133
Added:
Modified:
llvm/include/llvm/BinaryFormat/ELF.h
llvm/lib/ObjectYAML/ELFYAML.cpp
llvm/test/tools/llvm-readobj/ELF/file-header-machine-types.test
llvm/tools/llvm-readobj/ELFDumper.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/BinaryFormat/ELF.h b/llvm/include/llvm/BinaryFormat/ELF.h
index 7dd8cfd279819..f1046dbc87db9 100644
--- a/llvm/include/llvm/BinaryFormat/ELF.h
+++ b/llvm/include/llvm/BinaryFormat/ELF.h
@@ -281,6 +281,7 @@ enum {
EM_STM8 = 186, // STMicroeletronics STM8 8-bit microcontroller
EM_TILE64 = 187, // Tilera TILE64 multicore architecture family
EM_TILEPRO = 188, // Tilera TILEPro multicore architecture family
+ EM_MICROBLAZE = 189, // Xilinx MicroBlaze 32-bit RISC soft processor core
EM_CUDA = 190, // NVIDIA CUDA architecture
EM_TILEGX = 191, // Tilera TILE-Gx multicore architecture family
EM_CLOUDSHIELD = 192, // CloudShield architecture family
diff --git a/llvm/lib/ObjectYAML/ELFYAML.cpp b/llvm/lib/ObjectYAML/ELFYAML.cpp
index 70dc2d10735d8..2d09b5674f6ba 100644
--- a/llvm/lib/ObjectYAML/ELFYAML.cpp
+++ b/llvm/lib/ObjectYAML/ELFYAML.cpp
@@ -311,6 +311,7 @@ void ScalarEnumerationTraits<ELFYAML::ELF_EM>::enumeration(
ECase(EM_STM8);
ECase(EM_TILE64);
ECase(EM_TILEPRO);
+ ECase(EM_MICROBLAZE);
ECase(EM_CUDA);
ECase(EM_TILEGX);
ECase(EM_CLOUDSHIELD);
diff --git a/llvm/test/tools/llvm-readobj/ELF/file-header-machine-types.test b/llvm/test/tools/llvm-readobj/ELF/file-header-machine-types.test
index a497faacf8b3c..9ba1dff6ec84e 100644
--- a/llvm/test/tools/llvm-readobj/ELF/file-header-machine-types.test
+++ b/llvm/test/tools/llvm-readobj/ELF/file-header-machine-types.test
@@ -400,7 +400,7 @@
# RUN: llvm-readelf --file-headers %t.ecog16.o | FileCheck %s -DMACHINE="Cyan Technology eCOG16 family"
# RUN: yaml2obj %s -o %t.cr16.o -D MACHINE=EM_CR16
-# RUN: llvm-readelf --file-headers %t.cr16.o | FileCheck %s -DMACHINE="Xilinx MicroBlaze"
+# RUN: llvm-readelf --file-headers %t.cr16.o | FileCheck %s -DMACHINE="National Semiconductor CompactRISC 16-bit processor"
# RUN: yaml2obj %s -o %t.etpu.o -D MACHINE=EM_ETPU
# RUN: llvm-readelf --file-headers %t.etpu.o | FileCheck %s -DMACHINE="Freescale Extended Time Processing Unit"
@@ -429,6 +429,9 @@
# RUN: yaml2obj %s -o %t.tilepro.o -D MACHINE=EM_TILEPRO
# RUN: llvm-readelf --file-headers %t.tilepro.o | FileCheck %s -DMACHINE="Tilera TILEPro multicore architecture family"
+# RUN: yaml2obj %s -o %t.microblaze.o -D MACHINE=EM_MICROBLAZE
+# RUN: llvm-readelf --file-headers %t.microblaze.o | FileCheck %s -DMACHINE="Xilinx MicroBlaze 32-bit RISC soft processor core"
+
# RUN: yaml2obj %s -o %t.cuda.o -D MACHINE=EM_CUDA
# RUN: llvm-readelf --file-headers %t.cuda.o | FileCheck %s -DMACHINE="NVIDIA CUDA architecture"
diff --git a/llvm/tools/llvm-readobj/ELFDumper.cpp b/llvm/tools/llvm-readobj/ELFDumper.cpp
index 45c61a61b0284..1ffffb237a46b 100644
--- a/llvm/tools/llvm-readobj/ELFDumper.cpp
+++ b/llvm/tools/llvm-readobj/ELFDumper.cpp
@@ -1140,7 +1140,7 @@ static const EnumEntry<unsigned> ElfMachineType[] = {
ENUM_ENT(EM_METAG, "Imagination Technologies Meta processor architecture"),
ENUM_ENT(EM_MCST_ELBRUS, "MCST Elbrus general purpose hardware architecture"),
ENUM_ENT(EM_ECOG16, "Cyan Technology eCOG16 family"),
- ENUM_ENT(EM_CR16, "Xilinx MicroBlaze"),
+ ENUM_ENT(EM_CR16, "National Semiconductor CompactRISC 16-bit processor"),
ENUM_ENT(EM_ETPU, "Freescale Extended Time Processing Unit"),
ENUM_ENT(EM_SLE9X, "Infineon Technologies SLE9X core"),
ENUM_ENT(EM_L10M, "EM_L10M"),
@@ -1150,6 +1150,7 @@ static const EnumEntry<unsigned> ElfMachineType[] = {
ENUM_ENT(EM_STM8, "STMicroeletronics STM8 8-bit microcontroller"),
ENUM_ENT(EM_TILE64, "Tilera TILE64 multicore architecture family"),
ENUM_ENT(EM_TILEPRO, "Tilera TILEPro multicore architecture family"),
+ ENUM_ENT(EM_MICROBLAZE, "Xilinx MicroBlaze 32-bit RISC soft processor core"),
ENUM_ENT(EM_CUDA, "NVIDIA CUDA architecture"),
ENUM_ENT(EM_TILEGX, "Tilera TILE-Gx multicore architecture family"),
ENUM_ENT(EM_CLOUDSHIELD, "EM_CLOUDSHIELD"),
More information about the llvm-commits
mailing list