[PATCH] D101733: [M68k][AsmParser] Fix invalid register name parsing logics

[Min-Yih Hsu via Phabricator via llvm-commits]

myhsu updated this revision to Diff 342285.
myhsu added a comment.

Removing corresponding legacy test in the `test/CodeGen/M68k/Encoding` folder


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D101733/new/

https://reviews.llvm.org/D101733

Files:
  llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp
  llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMoveCCR.mir
  llvm/test/MC/M68k/Data/Classes/MxMoveCCR.s


Index: llvm/test/MC/M68k/Data/Classes/MxMoveCCR.s
===================================================================
--- /dev/null
+++ llvm/test/MC/M68k/Data/Classes/MxMoveCCR.s
@@ -0,0 +1,16 @@
+; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
+	.text
+	.globl	MxMoveToCCR
+; CHECK-LABEL: MxMoveToCCR:
+MxMoveToCCR:
+	; CHECK:      move.w  %d1, %ccr
+	; CHECK-SAME: encoding: [0x44,0xc1]
+	move.w	%d1, %ccr
+
+	.globl	MxMoveFromCCR
+; CHECK-LABEL: MxMoveFromCCR:
+MxMoveFromCCR:
+	; CHECK:      move.w  %ccr, %d1
+	; CHECK-SAME: encoding: [0x42,0xc1]
+	move.w	%ccr, %d1
+
Index: llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMoveCCR.mir
===================================================================
--- llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMoveCCR.mir
+++ /dev/null
@@ -1,34 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN:   | extract-section .text \
-# RUN:   | FileCheck %s -check-prefixes=MOV16CD,MOV16DC
-
-#------------------------------------------------------------------------------
-# MxMoveToCCR and MxMoveFromCCR load/store condition flag register
-#------------------------------------------------------------------------------
-
---- # To CCR
-#               ---------------------------------------+-----------+-----------
-#                F   E   D   C   B   A   9   8   7   6 | 5   4   3 | 2   1   0
-#               ---------------------------------------+-----------+-----------
-#                0   1   0   0   0   1   0   0   1   1 |    MODE   |    REG
-#               ---------------------------------------+-----------+-----------
-# MOV16CD:       0   1   0   0   0   1   0   0 . 1   1   0   0   0   0   0   1
-name: MxMoveToCCR
-body: |
-  bb.0:
-     $ccr = MOV16cd $wd1, implicit-def $ccr
-
-...
---- # From CCR
-#               ---------------------------------------+-----------+-----------
-#                F   E   D   C   B   A   9   8   7   6 | 5   4   3 | 2   1   0
-#               ---------------------------------------+-----------+-----------
-#                0   1   0   0   0   0   1   0   1   1 |    MODE   |    REG
-#               ---------------------------------------+-----------+-----------
-# MOV16DC-SAME:  0   1   0   0   0   0   1   0 . 1   1   0   0   0   0   0   1
-name: MxMoveFromCCR
-body: |
-  bb.0:
-     $wd1 = MOV16dc $ccr, implicit $ccr
-
-...
Index: llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp
===================================================================
--- llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp
+++ llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp
@@ -480,7 +480,7 @@
   auto RegisterNameLower = RegisterName.lower();
 
   // Parse simple general-purpose registers.
-  if (RegisterNameLower.size() == 2) {
+  if (RegisterNameLower.size() >= 2) {
     static unsigned RegistersByIndex[] = {
         M68k::D0, M68k::D1, M68k::D2, M68k::D3, M68k::D4, M68k::D5,
         M68k::D6, M68k::D7, M68k::A0, M68k::A1, M68k::A2, M68k::A3,


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