[llvm] 66b8a16 - [AMDGPU] Fix inconsistent ---/... in MIR tests and regenerate checks
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 30 06:12:39 PDT 2021
Author: Jay Foad
Date: 2021-04-30T14:10:50+01:00
New Revision: 66b8a16cc07c20f97f21c61d880f7924d47e597b
URL: https://github.com/llvm/llvm-project/commit/66b8a16cc07c20f97f21c61d880f7924d47e597b
DIFF: https://github.com/llvm/llvm-project/commit/66b8a16cc07c20f97f21c61d880f7924d47e597b.diff
LOG: [AMDGPU] Fix inconsistent ---/... in MIR tests and regenerate checks
In some cases the lack of --- or ... confused update_mir_test_checks.py
into not adding any checks for a function.
Added:
Modified:
llvm/test/CodeGen/AMDGPU/GlobalISel/combine-sext-inreg.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
llvm/test/CodeGen/AMDGPU/i1-copies-rpo.mir
llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir
llvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir
llvm/test/CodeGen/AMDGPU/sgpr-spill.mir
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-sext-inreg.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-sext-inreg.mir
index 45b6820df0582..619b761436512 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-sext-inreg.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-sext-inreg.mir
@@ -370,3 +370,4 @@ body: |
%assert_sext:_(s32) = G_ASSERT_SEXT %copy, 8
%sext_inreg:_(s32) = G_SEXT_INREG %assert_sext, 7
$vgpr0 = COPY %sext_inreg
+...
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert.mir
index d988a5e0195ea..10b9280837a7f 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert.mir
@@ -50,6 +50,7 @@ body: |
%17:sgpr(s512) = G_INSERT %16:sgpr, %1:sgpr(s32), 480
$sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 = COPY %17:sgpr(s512)
SI_RETURN_TO_EPILOG $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
+...
---
@@ -60,6 +61,11 @@ regBankSelected: true
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2
+ ; CHECK-LABEL: name: insert_v_s64_v_s32_0
+ ; CHECK: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
+ ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
+ ; CHECK: [[INSERT_SUBREG:%[0-9]+]]:vreg_64 = INSERT_SUBREG [[COPY]], [[COPY1]], %subreg.sub0
+ ; CHECK: S_ENDPGM 0, implicit [[INSERT_SUBREG]]
%0:vgpr(s64) = COPY $vgpr0_vgpr1
%1:vgpr(s32) = COPY $vgpr2
%2:vgpr(s64) = G_INSERT %0, %1, 0
@@ -598,3 +604,4 @@ body: |
%1:sgpr(<2 x s16>) = COPY $sgpr2
%2:sgpr(<4 x s16>) = G_INSERT %0, %1, 32
S_ENDPGM 0, implicit %2
+...
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
index 05b627bf7b47d..14a2bed2c0e56 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
@@ -263,11 +263,26 @@ body: |
G_STORE %1, %0 :: (store 1, addrspace 1)
...
+---
name: test_store_global_i1
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2
+ ; SI-LABEL: name: test_store_global_i1
+ ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
+ ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
+ ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+ ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
+ ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C]]
+ ; SI: G_STORE [[AND]](s32), [[COPY]](p1) :: (store 1, addrspace 1)
+ ; VI-LABEL: name: test_store_global_i1
+ ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
+ ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
+ ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+ ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
+ ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C]]
+ ; VI: G_STORE [[AND]](s32), [[COPY]](p1) :: (store 1, addrspace 1)
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(s32) = COPY $vgpr2
%2:_(s1) = G_TRUNC %1
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
index 6d257db958f12..4cedb8b02b6d5 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
@@ -1028,6 +1028,7 @@ body: |
S_NOP 0, implicit %2
...
+---
name: test_unmerge_s8_v4s8
body: |
bb.0:
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
index 4459ffb794734..55257e83b8219 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
@@ -170,6 +170,7 @@ body: |
%1:_(<16 x s32>) = G_LOAD %0 :: (load 64 from %ir.global.not.uniform.v16i32)
...
+---
name: load_global_v8i64_non_uniform
legalized: true
diff --git a/llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir b/llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
index c3c68e80a1c03..420984a532b62 100644
--- a/llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
+++ b/llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
@@ -1106,5 +1106,3 @@ body: |
renamable $agpr4_agpr5_agpr6_agpr7 = COPY renamable killed $agpr0_agpr1_agpr2_agpr3, implicit $exec
S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7
...
-
----
diff --git a/llvm/test/CodeGen/AMDGPU/i1-copies-rpo.mir b/llvm/test/CodeGen/AMDGPU/i1-copies-rpo.mir
index 4a858c0d744e5..b5d24fc20e088 100644
--- a/llvm/test/CodeGen/AMDGPU/i1-copies-rpo.mir
+++ b/llvm/test/CodeGen/AMDGPU/i1-copies-rpo.mir
@@ -49,3 +49,4 @@ body: |
%6:sreg_64 = V_CMP_EQ_U32_e64 killed %4, killed %5, implicit $exec
%1:vreg_1 = COPY %6
S_BRANCH %bb.1
+...
diff --git a/llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir b/llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir
index 3a6ff7c10ed68..ee8a7397c9c11 100644
--- a/llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir
+++ b/llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir
@@ -43,6 +43,7 @@
attributes #2 = { nounwind "amdgpu-num-vgpr"="3" }
attributes #3 = { nounwind "amdgpu-num-vgpr"="4" }
attributes #4 = { nounwind "amdgpu-num-vgpr"="5" }
+...
---
name: test_spill_v2_partial_agpr
diff --git a/llvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir b/llvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir
index 95f62e5e7cd3b..765148a99ac0e 100644
--- a/llvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir
+++ b/llvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir
@@ -189,10 +189,18 @@ body: |
S_SET_GPR_IDX_OFF implicit-def $mode, implicit $mode
...
+---
name:
diff erent_imm_index
body: |
bb.0:
+ ; GCN-LABEL: name:
diff erent_imm_index
+ ; GCN: S_SET_GPR_IDX_ON 1, 1, implicit-def $m0, implicit-def $mode, implicit undef $m0, implicit $mode
+ ; GCN: $vgpr16 = V_MOV_B32_e32 undef $vgpr1, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $m0
+ ; GCN: S_SET_GPR_IDX_OFF implicit-def $mode, implicit $mode
+ ; GCN: S_SET_GPR_IDX_ON 2, 1, implicit-def $m0, implicit-def $mode, implicit undef $m0, implicit $mode
+ ; GCN: $vgpr15 = V_MOV_B32_e32 undef $vgpr0, implicit $exec, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $m0
+ ; GCN: S_SET_GPR_IDX_OFF implicit-def $mode, implicit $mode
S_SET_GPR_IDX_ON 1, 1, implicit-def $m0, implicit-def $mode, implicit undef $m0, implicit $mode
$vgpr16 = V_MOV_B32_e32 undef $vgpr1, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $m0
S_SET_GPR_IDX_OFF implicit-def $mode, implicit $mode
diff --git a/llvm/test/CodeGen/AMDGPU/sgpr-spill.mir b/llvm/test/CodeGen/AMDGPU/sgpr-spill.mir
index a3968b7e4881e..b8402e9864cda 100644
--- a/llvm/test/CodeGen/AMDGPU/sgpr-spill.mir
+++ b/llvm/test/CodeGen/AMDGPU/sgpr-spill.mir
@@ -958,6 +958,7 @@ body: |
renamable $sgpr12 = IMPLICIT_DEF
SI_SPILL_S32_SAVE $sgpr12, %stack.8, implicit $exec, implicit $sgpr96_sgpr97_sgpr98_sgpr99, implicit $sgpr32
+...
---
name: check_reload
@@ -997,6 +998,410 @@ body: |
bb.0:
liveins: $sgpr8, $sgpr4_sgpr5, $sgpr6_sgpr7
+ ; GCN64-MUBUF-LABEL: name: check_reload
+ ; GCN64-MUBUF: liveins: $sgpr8, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr11
+ ; GCN64-MUBUF: $sgpr33 = S_MOV_B32 0
+ ; GCN64-MUBUF: $sgpr28 = S_MOV_B32 &SCRATCH_RSRC_DWORD0, implicit-def $sgpr28_sgpr29_sgpr30_sgpr31
+ ; GCN64-MUBUF: $sgpr29 = S_MOV_B32 &SCRATCH_RSRC_DWORD1, implicit-def $sgpr28_sgpr29_sgpr30_sgpr31
+ ; GCN64-MUBUF: $sgpr30 = S_MOV_B32 4294967295, implicit-def $sgpr28_sgpr29_sgpr30_sgpr31
+ ; GCN64-MUBUF: $sgpr31 = S_MOV_B32 14680064, implicit-def $sgpr28_sgpr29_sgpr30_sgpr31
+ ; GCN64-MUBUF: $sgpr28 = S_ADD_U32 $sgpr28, $sgpr11, implicit-def $scc, implicit-def $sgpr28_sgpr29_sgpr30_sgpr31
+ ; GCN64-MUBUF: $sgpr29 = S_ADDC_U32 $sgpr29, 0, implicit-def $scc, implicit $scc, implicit-def $sgpr28_sgpr29_sgpr30_sgpr31
+ ; GCN64-MUBUF: $sgpr0_sgpr1 = S_MOV_B64 $exec
+ ; GCN64-MUBUF: $exec = S_MOV_B64 1, implicit-def $vgpr0
+ ; GCN64-MUBUF: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 0, 0, 0, 0, implicit $exec :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 4, 0, 0, 0, implicit $exec :: (load 4 from %stack.0, addrspace 5)
+ ; GCN64-MUBUF: $sgpr12 = V_READLANE_B32 killed $vgpr0, 0
+ ; GCN64-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 0, 0, 0, 0, implicit $exec :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-MUBUF: $exec = S_MOV_B64 killed $sgpr0_sgpr1, implicit killed $vgpr0
+ ; GCN64-MUBUF: $sgpr0_sgpr1 = S_MOV_B64 $exec
+ ; GCN64-MUBUF: $exec = S_MOV_B64 3, implicit-def $vgpr0
+ ; GCN64-MUBUF: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 0, 0, 0, 0, implicit $exec :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 8, 0, 0, 0, implicit $exec :: (load 4 from %stack.1, addrspace 5)
+ ; GCN64-MUBUF: $sgpr12 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr12_sgpr13
+ ; GCN64-MUBUF: $sgpr13 = V_READLANE_B32 killed $vgpr0, 1
+ ; GCN64-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 0, 0, 0, 0, implicit $exec :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-MUBUF: $exec = S_MOV_B64 killed $sgpr0_sgpr1, implicit killed $vgpr0
+ ; GCN64-MUBUF: $sgpr0_sgpr1 = S_MOV_B64 $exec
+ ; GCN64-MUBUF: $exec = S_MOV_B64 7, implicit-def $vgpr0
+ ; GCN64-MUBUF: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 0, 0, 0, 0, implicit $exec :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 16, 0, 0, 0, implicit $exec :: (load 4 from %stack.2, addrspace 5)
+ ; GCN64-MUBUF: $sgpr12 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr12_sgpr13_sgpr14
+ ; GCN64-MUBUF: $sgpr13 = V_READLANE_B32 $vgpr0, 1
+ ; GCN64-MUBUF: $sgpr14 = V_READLANE_B32 killed $vgpr0, 2
+ ; GCN64-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 0, 0, 0, 0, implicit $exec :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-MUBUF: $exec = S_MOV_B64 killed $sgpr0_sgpr1, implicit killed $vgpr0
+ ; GCN64-MUBUF: $sgpr0_sgpr1 = S_MOV_B64 $exec
+ ; GCN64-MUBUF: $exec = S_MOV_B64 15, implicit-def $vgpr0
+ ; GCN64-MUBUF: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 0, 0, 0, 0, implicit $exec :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 28, 0, 0, 0, implicit $exec :: (load 4 from %stack.3, addrspace 5)
+ ; GCN64-MUBUF: $sgpr12 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr12_sgpr13_sgpr14_sgpr15
+ ; GCN64-MUBUF: $sgpr13 = V_READLANE_B32 $vgpr0, 1
+ ; GCN64-MUBUF: $sgpr14 = V_READLANE_B32 $vgpr0, 2
+ ; GCN64-MUBUF: $sgpr15 = V_READLANE_B32 killed $vgpr0, 3
+ ; GCN64-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 0, 0, 0, 0, implicit $exec :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-MUBUF: $exec = S_MOV_B64 killed $sgpr0_sgpr1, implicit killed $vgpr0
+ ; GCN64-MUBUF: $sgpr0_sgpr1 = S_MOV_B64 $exec
+ ; GCN64-MUBUF: $exec = S_MOV_B64 31, implicit-def $vgpr0
+ ; GCN64-MUBUF: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 0, 0, 0, 0, implicit $exec :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 44, 0, 0, 0, implicit $exec :: (load 4 from %stack.4, addrspace 5)
+ ; GCN64-MUBUF: $sgpr12 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr12_sgpr13_sgpr14_sgpr15_sgpr16
+ ; GCN64-MUBUF: $sgpr13 = V_READLANE_B32 $vgpr0, 1
+ ; GCN64-MUBUF: $sgpr14 = V_READLANE_B32 $vgpr0, 2
+ ; GCN64-MUBUF: $sgpr15 = V_READLANE_B32 $vgpr0, 3
+ ; GCN64-MUBUF: $sgpr16 = V_READLANE_B32 killed $vgpr0, 4
+ ; GCN64-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 0, 0, 0, 0, implicit $exec :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-MUBUF: $exec = S_MOV_B64 killed $sgpr0_sgpr1, implicit killed $vgpr0
+ ; GCN64-MUBUF: $sgpr0_sgpr1 = S_MOV_B64 $exec
+ ; GCN64-MUBUF: $exec = S_MOV_B64 255, implicit-def $vgpr0
+ ; GCN64-MUBUF: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 0, 0, 0, 0, implicit $exec :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 64, 0, 0, 0, implicit $exec :: (load 4 from %stack.5, addrspace 5)
+ ; GCN64-MUBUF: $sgpr12 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19
+ ; GCN64-MUBUF: $sgpr13 = V_READLANE_B32 $vgpr0, 1
+ ; GCN64-MUBUF: $sgpr14 = V_READLANE_B32 $vgpr0, 2
+ ; GCN64-MUBUF: $sgpr15 = V_READLANE_B32 $vgpr0, 3
+ ; GCN64-MUBUF: $sgpr16 = V_READLANE_B32 $vgpr0, 4
+ ; GCN64-MUBUF: $sgpr17 = V_READLANE_B32 $vgpr0, 5
+ ; GCN64-MUBUF: $sgpr18 = V_READLANE_B32 $vgpr0, 6
+ ; GCN64-MUBUF: $sgpr19 = V_READLANE_B32 killed $vgpr0, 7
+ ; GCN64-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 0, 0, 0, 0, implicit $exec :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-MUBUF: $exec = S_MOV_B64 killed $sgpr0_sgpr1, implicit killed $vgpr0
+ ; GCN64-MUBUF: $sgpr0_sgpr1 = S_MOV_B64 $exec
+ ; GCN64-MUBUF: $exec = S_MOV_B64 65535, implicit-def $vgpr0
+ ; GCN64-MUBUF: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 0, 0, 0, 0, implicit $exec :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 96, 0, 0, 0, implicit $exec :: (load 4 from %stack.6, addrspace 5)
+ ; GCN64-MUBUF: $sgpr12 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27
+ ; GCN64-MUBUF: $sgpr13 = V_READLANE_B32 $vgpr0, 1
+ ; GCN64-MUBUF: $sgpr14 = V_READLANE_B32 $vgpr0, 2
+ ; GCN64-MUBUF: $sgpr15 = V_READLANE_B32 $vgpr0, 3
+ ; GCN64-MUBUF: $sgpr16 = V_READLANE_B32 $vgpr0, 4
+ ; GCN64-MUBUF: $sgpr17 = V_READLANE_B32 $vgpr0, 5
+ ; GCN64-MUBUF: $sgpr18 = V_READLANE_B32 $vgpr0, 6
+ ; GCN64-MUBUF: $sgpr19 = V_READLANE_B32 $vgpr0, 7
+ ; GCN64-MUBUF: $sgpr20 = V_READLANE_B32 $vgpr0, 8
+ ; GCN64-MUBUF: $sgpr21 = V_READLANE_B32 $vgpr0, 9
+ ; GCN64-MUBUF: $sgpr22 = V_READLANE_B32 $vgpr0, 10
+ ; GCN64-MUBUF: $sgpr23 = V_READLANE_B32 $vgpr0, 11
+ ; GCN64-MUBUF: $sgpr24 = V_READLANE_B32 $vgpr0, 12
+ ; GCN64-MUBUF: $sgpr25 = V_READLANE_B32 $vgpr0, 13
+ ; GCN64-MUBUF: $sgpr26 = V_READLANE_B32 $vgpr0, 14
+ ; GCN64-MUBUF: $sgpr27 = V_READLANE_B32 killed $vgpr0, 15
+ ; GCN64-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 0, 0, 0, 0, implicit $exec :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-MUBUF: $exec = S_MOV_B64 killed $sgpr0_sgpr1, implicit killed $vgpr0
+ ; GCN64-MUBUF: $sgpr0_sgpr1 = S_MOV_B64 $exec
+ ; GCN64-MUBUF: $exec = S_MOV_B64 4294967295, implicit-def $vgpr0
+ ; GCN64-MUBUF: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 0, 0, 0, 0, implicit $exec :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 160, 0, 0, 0, implicit $exec :: (load 4 from %stack.7, addrspace 5)
+ ; GCN64-MUBUF: $sgpr64 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75_sgpr76_sgpr77_sgpr78_sgpr79_sgpr80_sgpr81_sgpr82_sgpr83_sgpr84_sgpr85_sgpr86_sgpr87_sgpr88_sgpr89_sgpr90_sgpr91_sgpr92_sgpr93_sgpr94_sgpr95
+ ; GCN64-MUBUF: $sgpr65 = V_READLANE_B32 $vgpr0, 1
+ ; GCN64-MUBUF: $sgpr66 = V_READLANE_B32 $vgpr0, 2
+ ; GCN64-MUBUF: $sgpr67 = V_READLANE_B32 $vgpr0, 3
+ ; GCN64-MUBUF: $sgpr68 = V_READLANE_B32 $vgpr0, 4
+ ; GCN64-MUBUF: $sgpr69 = V_READLANE_B32 $vgpr0, 5
+ ; GCN64-MUBUF: $sgpr70 = V_READLANE_B32 $vgpr0, 6
+ ; GCN64-MUBUF: $sgpr71 = V_READLANE_B32 $vgpr0, 7
+ ; GCN64-MUBUF: $sgpr72 = V_READLANE_B32 $vgpr0, 8
+ ; GCN64-MUBUF: $sgpr73 = V_READLANE_B32 $vgpr0, 9
+ ; GCN64-MUBUF: $sgpr74 = V_READLANE_B32 $vgpr0, 10
+ ; GCN64-MUBUF: $sgpr75 = V_READLANE_B32 $vgpr0, 11
+ ; GCN64-MUBUF: $sgpr76 = V_READLANE_B32 $vgpr0, 12
+ ; GCN64-MUBUF: $sgpr77 = V_READLANE_B32 $vgpr0, 13
+ ; GCN64-MUBUF: $sgpr78 = V_READLANE_B32 $vgpr0, 14
+ ; GCN64-MUBUF: $sgpr79 = V_READLANE_B32 $vgpr0, 15
+ ; GCN64-MUBUF: $sgpr80 = V_READLANE_B32 $vgpr0, 16
+ ; GCN64-MUBUF: $sgpr81 = V_READLANE_B32 $vgpr0, 17
+ ; GCN64-MUBUF: $sgpr82 = V_READLANE_B32 $vgpr0, 18
+ ; GCN64-MUBUF: $sgpr83 = V_READLANE_B32 $vgpr0, 19
+ ; GCN64-MUBUF: $sgpr84 = V_READLANE_B32 $vgpr0, 20
+ ; GCN64-MUBUF: $sgpr85 = V_READLANE_B32 $vgpr0, 21
+ ; GCN64-MUBUF: $sgpr86 = V_READLANE_B32 $vgpr0, 22
+ ; GCN64-MUBUF: $sgpr87 = V_READLANE_B32 $vgpr0, 23
+ ; GCN64-MUBUF: $sgpr88 = V_READLANE_B32 $vgpr0, 24
+ ; GCN64-MUBUF: $sgpr89 = V_READLANE_B32 $vgpr0, 25
+ ; GCN64-MUBUF: $sgpr90 = V_READLANE_B32 $vgpr0, 26
+ ; GCN64-MUBUF: $sgpr91 = V_READLANE_B32 $vgpr0, 27
+ ; GCN64-MUBUF: $sgpr92 = V_READLANE_B32 $vgpr0, 28
+ ; GCN64-MUBUF: $sgpr93 = V_READLANE_B32 $vgpr0, 29
+ ; GCN64-MUBUF: $sgpr94 = V_READLANE_B32 $vgpr0, 30
+ ; GCN64-MUBUF: $sgpr95 = V_READLANE_B32 killed $vgpr0, 31
+ ; GCN64-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 0, 0, 0, 0, implicit $exec :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-MUBUF: $exec = S_MOV_B64 killed $sgpr0_sgpr1, implicit killed $vgpr0
+ ; GCN64-MUBUF: $sgpr0_sgpr1 = S_MOV_B64 $exec
+ ; GCN64-MUBUF: $exec = S_MOV_B64 1, implicit-def $vgpr0
+ ; GCN64-MUBUF: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 0, 0, 0, 0, implicit $exec :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-MUBUF: $sgpr2 = S_ADD_U32 $sgpr33, 262144, implicit-def $scc
+ ; GCN64-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr28_sgpr29_sgpr30_sgpr31, killed $sgpr2, 0, 0, 0, 0, implicit $exec :: (load 4 from %stack.8, align 4096, addrspace 5)
+ ; GCN64-MUBUF: $sgpr12 = V_READLANE_B32 killed $vgpr0, 0
+ ; GCN64-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr28_sgpr29_sgpr30_sgpr31, $sgpr33, 0, 0, 0, 0, implicit $exec :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-MUBUF: $exec = S_MOV_B64 killed $sgpr0_sgpr1, implicit killed $vgpr0
+ ; GCN32-MUBUF-LABEL: name: check_reload
+ ; GCN32-MUBUF: liveins: $sgpr8, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr11
+ ; GCN32-MUBUF: $sgpr33 = S_MOV_B32 0
+ ; GCN32-MUBUF: $sgpr96 = S_MOV_B32 &SCRATCH_RSRC_DWORD0, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99
+ ; GCN32-MUBUF: $sgpr97 = S_MOV_B32 &SCRATCH_RSRC_DWORD1, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99
+ ; GCN32-MUBUF: $sgpr98 = S_MOV_B32 4294967295, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99
+ ; GCN32-MUBUF: $sgpr99 = S_MOV_B32 834756608, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99
+ ; GCN32-MUBUF: $sgpr96 = S_ADD_U32 $sgpr96, $sgpr11, implicit-def $scc, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99
+ ; GCN32-MUBUF: $sgpr97 = S_ADDC_U32 $sgpr97, 0, implicit-def $scc, implicit $scc, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99
+ ; GCN32-MUBUF: $sgpr0 = S_MOV_B32 $exec_lo
+ ; GCN32-MUBUF: $exec_lo = S_MOV_B32 1, implicit-def $vgpr0
+ ; GCN32-MUBUF: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 0, 0, 0, 0, implicit $exec :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN32-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 4, 0, 0, 0, implicit $exec :: (load 4 from %stack.0, addrspace 5)
+ ; GCN32-MUBUF: $sgpr12 = V_READLANE_B32 killed $vgpr0, 0
+ ; GCN32-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 0, 0, 0, 0, implicit $exec :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN32-MUBUF: $exec_lo = S_MOV_B32 killed $sgpr0, implicit killed $vgpr0
+ ; GCN32-MUBUF: $sgpr0 = S_MOV_B32 $exec_lo
+ ; GCN32-MUBUF: $exec_lo = S_MOV_B32 3, implicit-def $vgpr0
+ ; GCN32-MUBUF: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 0, 0, 0, 0, implicit $exec :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN32-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 8, 0, 0, 0, implicit $exec :: (load 4 from %stack.1, addrspace 5)
+ ; GCN32-MUBUF: $sgpr12 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr12_sgpr13
+ ; GCN32-MUBUF: $sgpr13 = V_READLANE_B32 killed $vgpr0, 1
+ ; GCN32-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 0, 0, 0, 0, implicit $exec :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN32-MUBUF: $exec_lo = S_MOV_B32 killed $sgpr0, implicit killed $vgpr0
+ ; GCN32-MUBUF: $sgpr0 = S_MOV_B32 $exec_lo
+ ; GCN32-MUBUF: $exec_lo = S_MOV_B32 7, implicit-def $vgpr0
+ ; GCN32-MUBUF: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 0, 0, 0, 0, implicit $exec :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN32-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 16, 0, 0, 0, implicit $exec :: (load 4 from %stack.2, addrspace 5)
+ ; GCN32-MUBUF: $sgpr12 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr12_sgpr13_sgpr14
+ ; GCN32-MUBUF: $sgpr13 = V_READLANE_B32 $vgpr0, 1
+ ; GCN32-MUBUF: $sgpr14 = V_READLANE_B32 killed $vgpr0, 2
+ ; GCN32-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 0, 0, 0, 0, implicit $exec :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN32-MUBUF: $exec_lo = S_MOV_B32 killed $sgpr0, implicit killed $vgpr0
+ ; GCN32-MUBUF: $sgpr0 = S_MOV_B32 $exec_lo
+ ; GCN32-MUBUF: $exec_lo = S_MOV_B32 15, implicit-def $vgpr0
+ ; GCN32-MUBUF: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 0, 0, 0, 0, implicit $exec :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN32-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 28, 0, 0, 0, implicit $exec :: (load 4 from %stack.3, addrspace 5)
+ ; GCN32-MUBUF: $sgpr12 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr12_sgpr13_sgpr14_sgpr15
+ ; GCN32-MUBUF: $sgpr13 = V_READLANE_B32 $vgpr0, 1
+ ; GCN32-MUBUF: $sgpr14 = V_READLANE_B32 $vgpr0, 2
+ ; GCN32-MUBUF: $sgpr15 = V_READLANE_B32 killed $vgpr0, 3
+ ; GCN32-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 0, 0, 0, 0, implicit $exec :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN32-MUBUF: $exec_lo = S_MOV_B32 killed $sgpr0, implicit killed $vgpr0
+ ; GCN32-MUBUF: $sgpr0 = S_MOV_B32 $exec_lo
+ ; GCN32-MUBUF: $exec_lo = S_MOV_B32 31, implicit-def $vgpr0
+ ; GCN32-MUBUF: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 0, 0, 0, 0, implicit $exec :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN32-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 44, 0, 0, 0, implicit $exec :: (load 4 from %stack.4, addrspace 5)
+ ; GCN32-MUBUF: $sgpr12 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr12_sgpr13_sgpr14_sgpr15_sgpr16
+ ; GCN32-MUBUF: $sgpr13 = V_READLANE_B32 $vgpr0, 1
+ ; GCN32-MUBUF: $sgpr14 = V_READLANE_B32 $vgpr0, 2
+ ; GCN32-MUBUF: $sgpr15 = V_READLANE_B32 $vgpr0, 3
+ ; GCN32-MUBUF: $sgpr16 = V_READLANE_B32 killed $vgpr0, 4
+ ; GCN32-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 0, 0, 0, 0, implicit $exec :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN32-MUBUF: $exec_lo = S_MOV_B32 killed $sgpr0, implicit killed $vgpr0
+ ; GCN32-MUBUF: $sgpr0 = S_MOV_B32 $exec_lo
+ ; GCN32-MUBUF: $exec_lo = S_MOV_B32 255, implicit-def $vgpr0
+ ; GCN32-MUBUF: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 0, 0, 0, 0, implicit $exec :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN32-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 64, 0, 0, 0, implicit $exec :: (load 4 from %stack.5, addrspace 5)
+ ; GCN32-MUBUF: $sgpr12 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19
+ ; GCN32-MUBUF: $sgpr13 = V_READLANE_B32 $vgpr0, 1
+ ; GCN32-MUBUF: $sgpr14 = V_READLANE_B32 $vgpr0, 2
+ ; GCN32-MUBUF: $sgpr15 = V_READLANE_B32 $vgpr0, 3
+ ; GCN32-MUBUF: $sgpr16 = V_READLANE_B32 $vgpr0, 4
+ ; GCN32-MUBUF: $sgpr17 = V_READLANE_B32 $vgpr0, 5
+ ; GCN32-MUBUF: $sgpr18 = V_READLANE_B32 $vgpr0, 6
+ ; GCN32-MUBUF: $sgpr19 = V_READLANE_B32 killed $vgpr0, 7
+ ; GCN32-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 0, 0, 0, 0, implicit $exec :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN32-MUBUF: $exec_lo = S_MOV_B32 killed $sgpr0, implicit killed $vgpr0
+ ; GCN32-MUBUF: $sgpr0 = S_MOV_B32 $exec_lo
+ ; GCN32-MUBUF: $exec_lo = S_MOV_B32 65535, implicit-def $vgpr0
+ ; GCN32-MUBUF: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 0, 0, 0, 0, implicit $exec :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN32-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 96, 0, 0, 0, implicit $exec :: (load 4 from %stack.6, addrspace 5)
+ ; GCN32-MUBUF: $sgpr12 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27
+ ; GCN32-MUBUF: $sgpr13 = V_READLANE_B32 $vgpr0, 1
+ ; GCN32-MUBUF: $sgpr14 = V_READLANE_B32 $vgpr0, 2
+ ; GCN32-MUBUF: $sgpr15 = V_READLANE_B32 $vgpr0, 3
+ ; GCN32-MUBUF: $sgpr16 = V_READLANE_B32 $vgpr0, 4
+ ; GCN32-MUBUF: $sgpr17 = V_READLANE_B32 $vgpr0, 5
+ ; GCN32-MUBUF: $sgpr18 = V_READLANE_B32 $vgpr0, 6
+ ; GCN32-MUBUF: $sgpr19 = V_READLANE_B32 $vgpr0, 7
+ ; GCN32-MUBUF: $sgpr20 = V_READLANE_B32 $vgpr0, 8
+ ; GCN32-MUBUF: $sgpr21 = V_READLANE_B32 $vgpr0, 9
+ ; GCN32-MUBUF: $sgpr22 = V_READLANE_B32 $vgpr0, 10
+ ; GCN32-MUBUF: $sgpr23 = V_READLANE_B32 $vgpr0, 11
+ ; GCN32-MUBUF: $sgpr24 = V_READLANE_B32 $vgpr0, 12
+ ; GCN32-MUBUF: $sgpr25 = V_READLANE_B32 $vgpr0, 13
+ ; GCN32-MUBUF: $sgpr26 = V_READLANE_B32 $vgpr0, 14
+ ; GCN32-MUBUF: $sgpr27 = V_READLANE_B32 killed $vgpr0, 15
+ ; GCN32-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 0, 0, 0, 0, implicit $exec :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN32-MUBUF: $exec_lo = S_MOV_B32 killed $sgpr0, implicit killed $vgpr0
+ ; GCN32-MUBUF: $sgpr0 = S_MOV_B32 $exec_lo
+ ; GCN32-MUBUF: $exec_lo = S_MOV_B32 4294967295, implicit-def $vgpr0
+ ; GCN32-MUBUF: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 0, 0, 0, 0, implicit $exec :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN32-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 160, 0, 0, 0, implicit $exec :: (load 4 from %stack.7, addrspace 5)
+ ; GCN32-MUBUF: $sgpr64 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75_sgpr76_sgpr77_sgpr78_sgpr79_sgpr80_sgpr81_sgpr82_sgpr83_sgpr84_sgpr85_sgpr86_sgpr87_sgpr88_sgpr89_sgpr90_sgpr91_sgpr92_sgpr93_sgpr94_sgpr95
+ ; GCN32-MUBUF: $sgpr65 = V_READLANE_B32 $vgpr0, 1
+ ; GCN32-MUBUF: $sgpr66 = V_READLANE_B32 $vgpr0, 2
+ ; GCN32-MUBUF: $sgpr67 = V_READLANE_B32 $vgpr0, 3
+ ; GCN32-MUBUF: $sgpr68 = V_READLANE_B32 $vgpr0, 4
+ ; GCN32-MUBUF: $sgpr69 = V_READLANE_B32 $vgpr0, 5
+ ; GCN32-MUBUF: $sgpr70 = V_READLANE_B32 $vgpr0, 6
+ ; GCN32-MUBUF: $sgpr71 = V_READLANE_B32 $vgpr0, 7
+ ; GCN32-MUBUF: $sgpr72 = V_READLANE_B32 $vgpr0, 8
+ ; GCN32-MUBUF: $sgpr73 = V_READLANE_B32 $vgpr0, 9
+ ; GCN32-MUBUF: $sgpr74 = V_READLANE_B32 $vgpr0, 10
+ ; GCN32-MUBUF: $sgpr75 = V_READLANE_B32 $vgpr0, 11
+ ; GCN32-MUBUF: $sgpr76 = V_READLANE_B32 $vgpr0, 12
+ ; GCN32-MUBUF: $sgpr77 = V_READLANE_B32 $vgpr0, 13
+ ; GCN32-MUBUF: $sgpr78 = V_READLANE_B32 $vgpr0, 14
+ ; GCN32-MUBUF: $sgpr79 = V_READLANE_B32 $vgpr0, 15
+ ; GCN32-MUBUF: $sgpr80 = V_READLANE_B32 $vgpr0, 16
+ ; GCN32-MUBUF: $sgpr81 = V_READLANE_B32 $vgpr0, 17
+ ; GCN32-MUBUF: $sgpr82 = V_READLANE_B32 $vgpr0, 18
+ ; GCN32-MUBUF: $sgpr83 = V_READLANE_B32 $vgpr0, 19
+ ; GCN32-MUBUF: $sgpr84 = V_READLANE_B32 $vgpr0, 20
+ ; GCN32-MUBUF: $sgpr85 = V_READLANE_B32 $vgpr0, 21
+ ; GCN32-MUBUF: $sgpr86 = V_READLANE_B32 $vgpr0, 22
+ ; GCN32-MUBUF: $sgpr87 = V_READLANE_B32 $vgpr0, 23
+ ; GCN32-MUBUF: $sgpr88 = V_READLANE_B32 $vgpr0, 24
+ ; GCN32-MUBUF: $sgpr89 = V_READLANE_B32 $vgpr0, 25
+ ; GCN32-MUBUF: $sgpr90 = V_READLANE_B32 $vgpr0, 26
+ ; GCN32-MUBUF: $sgpr91 = V_READLANE_B32 $vgpr0, 27
+ ; GCN32-MUBUF: $sgpr92 = V_READLANE_B32 $vgpr0, 28
+ ; GCN32-MUBUF: $sgpr93 = V_READLANE_B32 $vgpr0, 29
+ ; GCN32-MUBUF: $sgpr94 = V_READLANE_B32 $vgpr0, 30
+ ; GCN32-MUBUF: $sgpr95 = V_READLANE_B32 killed $vgpr0, 31
+ ; GCN32-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 0, 0, 0, 0, implicit $exec :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN32-MUBUF: $exec_lo = S_MOV_B32 killed $sgpr0, implicit killed $vgpr0
+ ; GCN32-MUBUF: $sgpr0 = S_MOV_B32 $exec_lo
+ ; GCN32-MUBUF: $exec_lo = S_MOV_B32 1, implicit-def $vgpr0
+ ; GCN32-MUBUF: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 0, 0, 0, 0, implicit $exec :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN32-MUBUF: $sgpr1 = S_ADD_U32 $sgpr33, 131072, implicit-def $scc
+ ; GCN32-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr96_sgpr97_sgpr98_sgpr99, killed $sgpr1, 0, 0, 0, 0, implicit $exec :: (load 4 from %stack.8, align 4096, addrspace 5)
+ ; GCN32-MUBUF: $sgpr12 = V_READLANE_B32 killed $vgpr0, 0
+ ; GCN32-MUBUF: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr96_sgpr97_sgpr98_sgpr99, $sgpr33, 0, 0, 0, 0, implicit $exec :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN32-MUBUF: $exec_lo = S_MOV_B32 killed $sgpr0, implicit killed $vgpr0
+ ; GCN64-FLATSCR-LABEL: name: check_reload
+ ; GCN64-FLATSCR: liveins: $sgpr8, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr11, $sgpr0_sgpr1
+ ; GCN64-FLATSCR: $sgpr33 = S_MOV_B32 0
+ ; GCN64-FLATSCR: $flat_scr_lo = S_ADD_U32 $sgpr0, $sgpr11, implicit-def $scc
+ ; GCN64-FLATSCR: $flat_scr_hi = S_ADDC_U32 $sgpr1, 0, implicit-def $scc, implicit $scc
+ ; GCN64-FLATSCR: $sgpr2_sgpr3 = S_MOV_B64 $exec
+ ; GCN64-FLATSCR: $exec = S_MOV_B64 1, implicit-def $vgpr0
+ ; GCN64-FLATSCR: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr33, 0, 0, implicit $exec, implicit $flat_scr :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-FLATSCR: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr33, 4, 0, implicit $exec, implicit $flat_scr :: (load 4 from %stack.0, addrspace 5)
+ ; GCN64-FLATSCR: $sgpr12 = V_READLANE_B32 killed $vgpr0, 0
+ ; GCN64-FLATSCR: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr33, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-FLATSCR: $exec = S_MOV_B64 killed $sgpr2_sgpr3, implicit killed $vgpr0
+ ; GCN64-FLATSCR: $sgpr2_sgpr3 = S_MOV_B64 $exec
+ ; GCN64-FLATSCR: $exec = S_MOV_B64 3, implicit-def $vgpr0
+ ; GCN64-FLATSCR: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr33, 0, 0, implicit $exec, implicit $flat_scr :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-FLATSCR: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr33, 8, 0, implicit $exec, implicit $flat_scr :: (load 4 from %stack.1, addrspace 5)
+ ; GCN64-FLATSCR: $sgpr12 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr12_sgpr13
+ ; GCN64-FLATSCR: $sgpr13 = V_READLANE_B32 killed $vgpr0, 1
+ ; GCN64-FLATSCR: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr33, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-FLATSCR: $exec = S_MOV_B64 killed $sgpr2_sgpr3, implicit killed $vgpr0
+ ; GCN64-FLATSCR: $sgpr2_sgpr3 = S_MOV_B64 $exec
+ ; GCN64-FLATSCR: $exec = S_MOV_B64 7, implicit-def $vgpr0
+ ; GCN64-FLATSCR: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr33, 0, 0, implicit $exec, implicit $flat_scr :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-FLATSCR: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr33, 16, 0, implicit $exec, implicit $flat_scr :: (load 4 from %stack.2, addrspace 5)
+ ; GCN64-FLATSCR: $sgpr12 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr12_sgpr13_sgpr14
+ ; GCN64-FLATSCR: $sgpr13 = V_READLANE_B32 $vgpr0, 1
+ ; GCN64-FLATSCR: $sgpr14 = V_READLANE_B32 killed $vgpr0, 2
+ ; GCN64-FLATSCR: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr33, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-FLATSCR: $exec = S_MOV_B64 killed $sgpr2_sgpr3, implicit killed $vgpr0
+ ; GCN64-FLATSCR: $sgpr2_sgpr3 = S_MOV_B64 $exec
+ ; GCN64-FLATSCR: $exec = S_MOV_B64 15, implicit-def $vgpr0
+ ; GCN64-FLATSCR: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr33, 0, 0, implicit $exec, implicit $flat_scr :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-FLATSCR: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr33, 28, 0, implicit $exec, implicit $flat_scr :: (load 4 from %stack.3, addrspace 5)
+ ; GCN64-FLATSCR: $sgpr12 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr12_sgpr13_sgpr14_sgpr15
+ ; GCN64-FLATSCR: $sgpr13 = V_READLANE_B32 $vgpr0, 1
+ ; GCN64-FLATSCR: $sgpr14 = V_READLANE_B32 $vgpr0, 2
+ ; GCN64-FLATSCR: $sgpr15 = V_READLANE_B32 killed $vgpr0, 3
+ ; GCN64-FLATSCR: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr33, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-FLATSCR: $exec = S_MOV_B64 killed $sgpr2_sgpr3, implicit killed $vgpr0
+ ; GCN64-FLATSCR: $sgpr2_sgpr3 = S_MOV_B64 $exec
+ ; GCN64-FLATSCR: $exec = S_MOV_B64 31, implicit-def $vgpr0
+ ; GCN64-FLATSCR: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr33, 0, 0, implicit $exec, implicit $flat_scr :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-FLATSCR: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr33, 44, 0, implicit $exec, implicit $flat_scr :: (load 4 from %stack.4, addrspace 5)
+ ; GCN64-FLATSCR: $sgpr12 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr12_sgpr13_sgpr14_sgpr15_sgpr16
+ ; GCN64-FLATSCR: $sgpr13 = V_READLANE_B32 $vgpr0, 1
+ ; GCN64-FLATSCR: $sgpr14 = V_READLANE_B32 $vgpr0, 2
+ ; GCN64-FLATSCR: $sgpr15 = V_READLANE_B32 $vgpr0, 3
+ ; GCN64-FLATSCR: $sgpr16 = V_READLANE_B32 killed $vgpr0, 4
+ ; GCN64-FLATSCR: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr33, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-FLATSCR: $exec = S_MOV_B64 killed $sgpr2_sgpr3, implicit killed $vgpr0
+ ; GCN64-FLATSCR: $sgpr2_sgpr3 = S_MOV_B64 $exec
+ ; GCN64-FLATSCR: $exec = S_MOV_B64 255, implicit-def $vgpr0
+ ; GCN64-FLATSCR: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr33, 0, 0, implicit $exec, implicit $flat_scr :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-FLATSCR: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr33, 64, 0, implicit $exec, implicit $flat_scr :: (load 4 from %stack.5, addrspace 5)
+ ; GCN64-FLATSCR: $sgpr12 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19
+ ; GCN64-FLATSCR: $sgpr13 = V_READLANE_B32 $vgpr0, 1
+ ; GCN64-FLATSCR: $sgpr14 = V_READLANE_B32 $vgpr0, 2
+ ; GCN64-FLATSCR: $sgpr15 = V_READLANE_B32 $vgpr0, 3
+ ; GCN64-FLATSCR: $sgpr16 = V_READLANE_B32 $vgpr0, 4
+ ; GCN64-FLATSCR: $sgpr17 = V_READLANE_B32 $vgpr0, 5
+ ; GCN64-FLATSCR: $sgpr18 = V_READLANE_B32 $vgpr0, 6
+ ; GCN64-FLATSCR: $sgpr19 = V_READLANE_B32 killed $vgpr0, 7
+ ; GCN64-FLATSCR: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr33, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-FLATSCR: $exec = S_MOV_B64 killed $sgpr2_sgpr3, implicit killed $vgpr0
+ ; GCN64-FLATSCR: $sgpr2_sgpr3 = S_MOV_B64 $exec
+ ; GCN64-FLATSCR: $exec = S_MOV_B64 65535, implicit-def $vgpr0
+ ; GCN64-FLATSCR: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr33, 0, 0, implicit $exec, implicit $flat_scr :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-FLATSCR: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr33, 96, 0, implicit $exec, implicit $flat_scr :: (load 4 from %stack.6, addrspace 5)
+ ; GCN64-FLATSCR: $sgpr12 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27
+ ; GCN64-FLATSCR: $sgpr13 = V_READLANE_B32 $vgpr0, 1
+ ; GCN64-FLATSCR: $sgpr14 = V_READLANE_B32 $vgpr0, 2
+ ; GCN64-FLATSCR: $sgpr15 = V_READLANE_B32 $vgpr0, 3
+ ; GCN64-FLATSCR: $sgpr16 = V_READLANE_B32 $vgpr0, 4
+ ; GCN64-FLATSCR: $sgpr17 = V_READLANE_B32 $vgpr0, 5
+ ; GCN64-FLATSCR: $sgpr18 = V_READLANE_B32 $vgpr0, 6
+ ; GCN64-FLATSCR: $sgpr19 = V_READLANE_B32 $vgpr0, 7
+ ; GCN64-FLATSCR: $sgpr20 = V_READLANE_B32 $vgpr0, 8
+ ; GCN64-FLATSCR: $sgpr21 = V_READLANE_B32 $vgpr0, 9
+ ; GCN64-FLATSCR: $sgpr22 = V_READLANE_B32 $vgpr0, 10
+ ; GCN64-FLATSCR: $sgpr23 = V_READLANE_B32 $vgpr0, 11
+ ; GCN64-FLATSCR: $sgpr24 = V_READLANE_B32 $vgpr0, 12
+ ; GCN64-FLATSCR: $sgpr25 = V_READLANE_B32 $vgpr0, 13
+ ; GCN64-FLATSCR: $sgpr26 = V_READLANE_B32 $vgpr0, 14
+ ; GCN64-FLATSCR: $sgpr27 = V_READLANE_B32 killed $vgpr0, 15
+ ; GCN64-FLATSCR: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr33, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-FLATSCR: $exec = S_MOV_B64 killed $sgpr2_sgpr3, implicit killed $vgpr0
+ ; GCN64-FLATSCR: $sgpr2_sgpr3 = S_MOV_B64 $exec
+ ; GCN64-FLATSCR: $exec = S_MOV_B64 4294967295, implicit-def $vgpr0
+ ; GCN64-FLATSCR: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr33, 0, 0, implicit $exec, implicit $flat_scr :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-FLATSCR: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr33, 160, 0, implicit $exec, implicit $flat_scr :: (load 4 from %stack.7, addrspace 5)
+ ; GCN64-FLATSCR: $sgpr64 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75_sgpr76_sgpr77_sgpr78_sgpr79_sgpr80_sgpr81_sgpr82_sgpr83_sgpr84_sgpr85_sgpr86_sgpr87_sgpr88_sgpr89_sgpr90_sgpr91_sgpr92_sgpr93_sgpr94_sgpr95
+ ; GCN64-FLATSCR: $sgpr65 = V_READLANE_B32 $vgpr0, 1
+ ; GCN64-FLATSCR: $sgpr66 = V_READLANE_B32 $vgpr0, 2
+ ; GCN64-FLATSCR: $sgpr67 = V_READLANE_B32 $vgpr0, 3
+ ; GCN64-FLATSCR: $sgpr68 = V_READLANE_B32 $vgpr0, 4
+ ; GCN64-FLATSCR: $sgpr69 = V_READLANE_B32 $vgpr0, 5
+ ; GCN64-FLATSCR: $sgpr70 = V_READLANE_B32 $vgpr0, 6
+ ; GCN64-FLATSCR: $sgpr71 = V_READLANE_B32 $vgpr0, 7
+ ; GCN64-FLATSCR: $sgpr72 = V_READLANE_B32 $vgpr0, 8
+ ; GCN64-FLATSCR: $sgpr73 = V_READLANE_B32 $vgpr0, 9
+ ; GCN64-FLATSCR: $sgpr74 = V_READLANE_B32 $vgpr0, 10
+ ; GCN64-FLATSCR: $sgpr75 = V_READLANE_B32 $vgpr0, 11
+ ; GCN64-FLATSCR: $sgpr76 = V_READLANE_B32 $vgpr0, 12
+ ; GCN64-FLATSCR: $sgpr77 = V_READLANE_B32 $vgpr0, 13
+ ; GCN64-FLATSCR: $sgpr78 = V_READLANE_B32 $vgpr0, 14
+ ; GCN64-FLATSCR: $sgpr79 = V_READLANE_B32 $vgpr0, 15
+ ; GCN64-FLATSCR: $sgpr80 = V_READLANE_B32 $vgpr0, 16
+ ; GCN64-FLATSCR: $sgpr81 = V_READLANE_B32 $vgpr0, 17
+ ; GCN64-FLATSCR: $sgpr82 = V_READLANE_B32 $vgpr0, 18
+ ; GCN64-FLATSCR: $sgpr83 = V_READLANE_B32 $vgpr0, 19
+ ; GCN64-FLATSCR: $sgpr84 = V_READLANE_B32 $vgpr0, 20
+ ; GCN64-FLATSCR: $sgpr85 = V_READLANE_B32 $vgpr0, 21
+ ; GCN64-FLATSCR: $sgpr86 = V_READLANE_B32 $vgpr0, 22
+ ; GCN64-FLATSCR: $sgpr87 = V_READLANE_B32 $vgpr0, 23
+ ; GCN64-FLATSCR: $sgpr88 = V_READLANE_B32 $vgpr0, 24
+ ; GCN64-FLATSCR: $sgpr89 = V_READLANE_B32 $vgpr0, 25
+ ; GCN64-FLATSCR: $sgpr90 = V_READLANE_B32 $vgpr0, 26
+ ; GCN64-FLATSCR: $sgpr91 = V_READLANE_B32 $vgpr0, 27
+ ; GCN64-FLATSCR: $sgpr92 = V_READLANE_B32 $vgpr0, 28
+ ; GCN64-FLATSCR: $sgpr93 = V_READLANE_B32 $vgpr0, 29
+ ; GCN64-FLATSCR: $sgpr94 = V_READLANE_B32 $vgpr0, 30
+ ; GCN64-FLATSCR: $sgpr95 = V_READLANE_B32 killed $vgpr0, 31
+ ; GCN64-FLATSCR: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr33, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-FLATSCR: $exec = S_MOV_B64 killed $sgpr2_sgpr3, implicit killed $vgpr0
+ ; GCN64-FLATSCR: $sgpr2_sgpr3 = S_MOV_B64 $exec
+ ; GCN64-FLATSCR: $exec = S_MOV_B64 1, implicit-def $vgpr0
+ ; GCN64-FLATSCR: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr33, 0, 0, implicit $exec, implicit $flat_scr :: (store 4 into %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-FLATSCR: $sgpr9 = S_ADD_U32 $sgpr33, 4096, implicit-def $scc
+ ; GCN64-FLATSCR: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR killed $sgpr9, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %stack.8, align 4096, addrspace 5)
+ ; GCN64-FLATSCR: $sgpr12 = V_READLANE_B32 killed $vgpr0, 0
+ ; GCN64-FLATSCR: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr33, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %fixed-stack.0, align 16, addrspace 5)
+ ; GCN64-FLATSCR: $exec = S_MOV_B64 killed $sgpr2_sgpr3, implicit killed $vgpr0
renamable $sgpr12 = SI_SPILL_S32_RESTORE %stack.0, implicit $exec, implicit $sgpr96_sgpr97_sgpr98_sgpr99, implicit $sgpr32
renamable $sgpr12_sgpr13 = SI_SPILL_S64_RESTORE %stack.1, implicit $exec, implicit $sgpr96_sgpr97_sgpr98_sgpr99, implicit $sgpr32
@@ -1014,3 +1419,4 @@ body: |
renamable $sgpr64_sgpr65_sgpr66_sgpr67_sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75_sgpr76_sgpr77_sgpr78_sgpr79_sgpr80_sgpr81_sgpr82_sgpr83_sgpr84_sgpr85_sgpr86_sgpr87_sgpr88_sgpr89_sgpr90_sgpr91_sgpr92_sgpr93_sgpr94_sgpr95 = SI_SPILL_S1024_RESTORE %stack.7, implicit $exec, implicit $sgpr96_sgpr97_sgpr98_sgpr99, implicit $sgpr32
renamable $sgpr12 = SI_SPILL_S32_RESTORE %stack.8, implicit $exec, implicit $sgpr96_sgpr97_sgpr98_sgpr99, implicit $sgpr32
+...
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