[PATCH] D99272: [AArch64] Adds a pre-indexed paired Load/Store optimization for LDR-STR.

Stelios Ioannou via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 30 04:13:50 PDT 2021


stelios-arm updated this revision to Diff 341838.
stelios-arm marked 3 inline comments as done.
stelios-arm added a comment.

Addressed the comments made by @dmgreen.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D99272/new/

https://reviews.llvm.org/D99272

Files:
  llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  llvm/lib/Target/AArch64/AArch64InstrInfo.h
  llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
  llvm/test/CodeGen/AArch64/arm64-memset-inline.ll
  llvm/test/CodeGen/AArch64/ldrpre-ldr-merge.mir
  llvm/test/CodeGen/AArch64/strpre-str-merge.mir

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D99272.341838.patch
Type: text/x-patch
Size: 57591 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210430/58c1a101/attachment.bin>


More information about the llvm-commits mailing list