[PATCH] D100816: [AArch64][SVE] Lower index_vector to step_vector
Paul Walker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 30 03:17:46 PDT 2021
paulwalker-arm accepted this revision.
paulwalker-arm added inline comments.
This revision is now accepted and ready to land.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:13650
SDValue Op2 = N->getOperand(2);
- EVT ScalarTy = Op1.getValueType();
-
- if ((ScalarTy == MVT::i8) || (ScalarTy == MVT::i16)) {
- Op1 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, Op1);
- Op2 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, Op2);
- }
+ EVT ScalarTy = Op2.getValueType();
+ if ((ScalarTy == MVT::i8) || (ScalarTy == MVT::i16))
----------------
Up to you but this change is not needed because Op1 and Op2 must be the same type.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D100816/new/
https://reviews.llvm.org/D100816
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