[PATCH] D101169: [AArch64][SVE] Use SIMD variant of INSR when scalar is the result of a vector extract

Bradley Smith via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 29 04:18:27 PDT 2021


This revision was automatically updated to reflect the committed changes.
Closed by commit rG354604a2a714: [AArch64][SVE] Use SIMD variant of INSR when scalar is the result of a vector… (authored by bsmith).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D101169/new/

https://reviews.llvm.org/D101169

Files:
  llvm/lib/Target/AArch64/SVEInstrFormats.td
  llvm/test/CodeGen/AArch64/sve-insr.ll

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