[PATCH] D100747: [Greedy RA] Last Split point for invoke statepoint should be statepoint itself
Serguei Katkov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 29 02:53:45 PDT 2021
skatkov updated this revision to Diff 341444.
skatkov added a comment.
ll test replaced with mir one.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D100747/new/
https://reviews.llvm.org/D100747
Files:
llvm/lib/CodeGen/SplitKit.cpp
llvm/test/CodeGen/X86/statepoint-invoke-ra.mir
Index: llvm/test/CodeGen/X86/statepoint-invoke-ra.mir
===================================================================
--- llvm/test/CodeGen/X86/statepoint-invoke-ra.mir
+++ llvm/test/CodeGen/X86/statepoint-invoke-ra.mir
@@ -43,8 +43,8 @@
# CHECK: 416B dead $esi = MOV32r0 implicit-def dead $eflags, implicit-def $rsi
# CHECK: 432B $ecx = COPY %7:gr32
# CHECK: 448B $r8d = MOV32r0 implicit-def dead $eflags
-# CHECK: 528B %32:gr64, %31:gr64, %30:gr64, %41:gr64 = STATEPOINT 1, 16, 5, undef %23:gr64, $edi, $rsi, undef $edx, $ecx, $r8d, 2, 0, 2, 0, 2, 11, 1, 4, %stack.0, 0, %30:gr64, 1, 4, %stack.1, 0, 1, 4, %stack.2, 0, 1, 4, %stack.3, 0, 1, 4, %stack.4, 0, 1, 4, %stack.2, 0, %41:gr64, 1, 4, %stack.5, 0, %31:gr64, %32:gr64, 2, 4, %32:gr64(tied-def 0), %31:gr64(tied-def 1), %30:gr64(tied-def 2), %41:gr64(tied-def 3), 2, 0, 2, 4, 0, 0, 1, 1, 2, 2, 3, 3, <regmask $bh $bl $bp $bph $bpl $bx $ebp $ebx $hbp $hbx $rbp $rbx $r12 $r13 $r14 $r15 $r12b $r13b $r14b $r15b $r12bh $r13bh $r14bh $r15bh $r12d $r13d $r14d $r15d $r12w $r13w $r14w $r15w $r12wh and 3 more...>, implicit-def $rsp, implicit-def $ssp, implicit-def dead $eax :: (volatile load store 4 on %stack.0), (volatile load store 4 on %stack.1), (volatile load store 4 on %stack.2), (volatile load store 4 on %stack.3), (volatile load store 4 on %stack.4), (volatile load store 4 on %stack.5)
-# CHECK: 536B %40:gr64 = COPY %41:gr64
+# CHECK: 456B %40:gr64 = COPY %41:gr64
+# CHECK: 528B %32:gr64, %31:gr64, %30:gr64, %42:gr64 = STATEPOINT 1, 16, 5, undef %23:gr64, $edi, $rsi, undef $edx, $ecx, $r8d, 2, 0, 2, 0, 2, 11, 1, 4, %stack.0, 0, %30:gr64, 1, 4, %stack.1, 0, 1, 4, %stack.2, 0, 1, 4, %stack.3, 0, 1, 4, %stack.4, 0, 1, 4, %stack.2, 0, %41:gr64, 1, 4, %stack.5, 0, %31:gr64, %32:gr64, 2, 4, %32:gr64(tied-def 0), %31:gr64(tied-def 1), %30:gr64(tied-def 2), %41:gr64(tied-def 3), 2, 0, 2, 4, 0, 0, 1, 1, 2, 2, 3, 3, <regmask $bh $bl $bp $bph $bpl $bx $ebp $ebx $hbp $hbx $rbp $rbx $r12 $r13 $r14 $r15 $r12b $r13b $r14b $r15b $r12bh $r13bh $r14bh $r15bh $r12d $r13d $r14d $r15d $r12w $r13w $r14w $r15w $r12wh and 3 more...>, implicit-def $rsp, implicit-def $ssp, implicit-def dead $eax :: (volatile load store 4 on %stack.0), (volatile load store 4 on %stack.1), (volatile load store 4 on %stack.2), (volatile load store 4 on %stack.3), (volatile load store 4 on %stack.4), (volatile load store 4 on %stack.5)
# CHECK: 544B ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
# CHECK: 560B EH_LABEL <mcsymbol .Ltmp1>
# CHECK: 576B JMP_1 %bb.1
@@ -68,17 +68,22 @@
# CHECK: 848B MOV32mr %stack.4, 1, $noreg, 0, $noreg, %39:gr32 :: (store 4 into %stack.4)
# CHECK: 864B ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
# CHECK: 896B $edi = MOV32ri -271
-# CHECK: 928B dead %40:gr64 = STATEPOINT 2882400000, 0, 1, target-flags(x86-plt) @quux, $edi, 2, 0, 2, 0, 2, 6, 1, 4, %stack.0, 0, 1, 4, %stack.1, 0, 1, 4, %stack.2, 0, 1, 4, %stack.3, 0, %40:gr64, 1, 4, %stack.4, 0, 2, 1, %40:gr64(tied-def 0), 2, 0, 2, 1, 0, 0, <regmask $bh $bl $bp $bph $bpl $bx $ebp $ebx $hbp $hbx $rbp $rbx $r12 $r13 $r14 $r15 $r12b $r13b $r14b $r15b $r12bh $r13bh $r14bh $r15bh $r12d $r13d $r14d $r15d $r12w $r13w $r14w $r15w $r12wh and 3 more...>, implicit-def $rsp, implicit-def $ssp :: (volatile load store 4 on %stack.0), (volatile load store 4 on %stack.1), (volatile load store 4 on %stack.2), (volatile load store 4 on %stack.3), (volatile load store 4 on %stack.4)
+# CHECK: 928B dead %42:gr64 = STATEPOINT 2882400000, 0, 1, target-flags(x86-plt) @quux, $edi, 2, 0, 2, 0, 2, 6, 1, 4, %stack.0, 0, 1, 4, %stack.1, 0, 1, 4, %stack.2, 0, 1, 4, %stack.3, 0, %42:gr64, 1, 4, %stack.4, 0, 2, 1, %42:gr64(tied-def 0), 2, 0, 2, 1, 0, 0, <regmask $bh $bl $bp $bph $bpl $bx $ebp $ebx $hbp $hbx $rbp $rbx $r12 $r13 $r14 $r15 $r12b $r13b $r14b $r15b $r12bh $r13bh $r14bh $r15bh $r12d $r13d $r14d $r15d $r12w $r13w $r14w $r15w $r12wh and 3 more...>, implicit-def $rsp, implicit-def $ssp :: (volatile load store 4 on %stack.0), (volatile load store 4 on %stack.1), (volatile load store 4 on %stack.2), (volatile load store 4 on %stack.3), (volatile load store 4 on %stack.4)
# CHECK: 944B ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
# CHECK: # End machine code for function wombat.
-# CHECK: *** Bad machine code: Register not marked live out of predecessor ***
+# CHECK: *** Bad machine code: Two-address instruction operands must be identical ***
# CHECK: - function: wombat
# CHECK: - basic block: %bb.0 bb
-# CHECK: - liverange: [536r,592B:0)[752B,928r:0)[928r,928d:1) 0 at 536r 1 at 928r
+# CHECK: - instruction: 528B %32:gr64, %31:gr64, %30:gr64, %42:gr64 = STATEPOINT 1, 16, 5, undef %23:gr64, $edi, $rsi, undef $edx, $ecx, $r8d, 2, 0, 2, 0, 2, 11, 1, 4, %stack.0, 0, %30:gr64, 1, 4, %stack.1, 0, 1, 4, %stack.2, 0, 1, 4, %stack.3, 0, 1, 4, %stack.4, 0, 1, 4, %stack.2, 0, %41:gr64, 1, 4, %stack.5, 0, %31:gr64, %32:gr64, 2, 4, %32:gr64(tied-def 0), %31:gr64(tied-def 1), %30:gr64(tied-def 2), %41:gr64(tied-def 3), 2, 0, 2, 4, 0, 0, 1, 1, 2, 2, 3, 3, <regmask $bh $bl $bp $bph $bpl $bx $ebp $ebx $hbp $hbx $rbp $rbx $r12 $r13 $r14 $r15 $r12b $r13b $r14b $r15b $r12bh $r13bh $r14bh $r15bh $r12d $r13d $r14d $r15d $r12w $r13w $r14w $r15w $r12wh and 3 more...>, implicit-def $rsp, implicit-def $ssp, implicit-def dead $eax :: (volatile load store 4 on %stack.0), (volatile load store 4 on %stack.1), (volatile load store 4 on %stack.2), (volatile load store 4 on %stack.3), (volatile load store 4 on %stack.4), (volatile load store 4 on %stack.5)
+# CHECK: - operand 56: %41:gr64(tied-def 0)
+# CHECK: *** Bad machine code: Instruction ending live segment on dead slot has no dead flag ***
+# CHECK: - function: wombat
+# CHECK: - basic block: %bb.0 bb
+# CHECK: - instruction: 456B %40:gr64 = COPY %41:gr64
+# CHECK: - liverange: [456r,456d:0) 0 at 456r
# CHECK: - v. register: %40
-# CHECK: - ValNo: 0 (def 536r)
-# CHECK: live into %bb.2 at 752B, not live before 528d
-# CHECK: LLVM ERROR: Found 1 machine code errors.
+# CHECK: - segment: [456r,456d:0)
+# CHECK: LLVM ERROR: Found 2 machine code errors.
--- |
; ModuleID = './statepoint-invoke-ra1.ll'
source_filename = "./statepoint-invoke-ra1.ll"
Index: llvm/lib/CodeGen/SplitKit.cpp
===================================================================
--- llvm/lib/CodeGen/SplitKit.cpp
+++ llvm/lib/CodeGen/SplitKit.cpp
@@ -118,6 +118,13 @@
if (!VNI)
return LIP.first;
+ // The def of statepoint instruction is a gc relocation and it should be alive
+ // in landing pad. So we cannot split interval after statepoint instruction.
+ if (SlotIndex::isSameInstr(VNI->def, LIP.second))
+ if (auto *I = LIS.getInstructionFromIndex(LIP.second))
+ if (I->getOpcode() == TargetOpcode::STATEPOINT)
+ return LIP.second;
+
// If the value leaving MBB was defined after the call in MBB, it can't
// really be live-in to the landing pad. This can happen if the landing pad
// has a PHI, and this register is undef on the exceptional edge.
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D100747.341444.patch
Type: text/x-patch
Size: 7322 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210429/a01e8baa/attachment.bin>
More information about the llvm-commits
mailing list