[llvm] 465df35 - [ARM] Use just ARM::t2B in ARMBlockPlacementPass

[David Green via llvm-commits]

Author: David Green
Date: 2021-04-29T07:44:04+01:00
New Revision: 465df35355ec30ab8c60ef1c0c156a6b22bda7d4

URL: https://github.com/llvm/llvm-project/commit/465df35355ec30ab8c60ef1c0c156a6b22bda7d4
DIFF: https://github.com/llvm/llvm-project/commit/465df35355ec30ab8c60ef1c0c156a6b22bda7d4.diff

LOG: [ARM] Use just ARM::t2B in ARMBlockPlacementPass

The ARMConstantIsland pass will convert any t2B to tB if they are within
range after it has added or moved any constant pools. They don't need to
be deliberately converted beforehand, and it doesn't deal with needing
to convert tB to t2B very well.

Added: 
    

Modified: 
    llvm/lib/Target/ARM/ARMBlockPlacement.cpp
    llvm/test/CodeGen/Thumb2/block-placement.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/ARM/ARMBlockPlacement.cpp b/llvm/lib/Target/ARM/ARMBlockPlacement.cpp
index 57914b3b3d61..e71af5f36f19 100644
--- a/llvm/lib/Target/ARM/ARMBlockPlacement.cpp
+++ b/llvm/lib/Target/ARM/ARMBlockPlacement.cpp
@@ -237,10 +237,8 @@ void ARMBlockPlacement::moveBasicBlock(MachineBasicBlock *BB,
     if (!Terminator.isUnconditionalBranch()) {
       // The BB doesn't have an unconditional branch so it relied on
       // fall-through. Fix by adding an unconditional branch to the moved BB.
-      unsigned BrOpc =
-          BBUtils->isBBInRange(&Terminator, To, 254) ? ARM::tB : ARM::t2B;
       MachineInstrBuilder MIB =
-          BuildMI(From, Terminator.getDebugLoc(), TII->get(BrOpc));
+          BuildMI(From, Terminator.getDebugLoc(), TII->get(ARM::t2B));
       MIB.addMBB(To);
       MIB.addImm(ARMCC::CondCodes::AL);
       MIB.addReg(ARM::NoRegister);

diff  --git a/llvm/test/CodeGen/Thumb2/block-placement.mir b/llvm/test/CodeGen/Thumb2/block-placement.mir
index 9f40817e0c42..7ea87c3859dd 100644
--- a/llvm/test/CodeGen/Thumb2/block-placement.mir
+++ b/llvm/test/CodeGen/Thumb2/block-placement.mir
@@ -60,7 +60,7 @@ body:             |
   ; CHECK: bb.2:
   ; CHECK:   successors: %bb.3(0x80000000)
   ; CHECK:   $lr = t2WhileLoopStartLR killed renamable $r0, %bb.1, implicit-def dead $cpsr
-  ; CHECK:   tB %bb.3, 14 /* CC::al */, $noreg
+  ; CHECK:   t2B %bb.3, 14 /* CC::al */, $noreg
   ; CHECK: bb.1:
   ; CHECK:   frame-destroy tPOP_RET 14 /* CC::al */, $noreg, def $r7, def $pc
   ; CHECK: bb.3:
@@ -157,7 +157,7 @@ body:             |
   ; CHECK:   $lr = tMOVr $r0, 14 /* CC::al */, $noreg
   ; CHECK:   renamable $r0 = t2ADDrs killed renamable $r2, killed $r0, 18, 14 /* CC::al */, $noreg, $noreg
   ; CHECK:   $lr = t2WhileLoopStartLR killed renamable $lr, %bb.1, implicit-def dead $cpsr
-  ; CHECK:   tB %bb.3, 14 /* CC::al */, $noreg
+  ; CHECK:   t2B %bb.3, 14 /* CC::al */, $noreg
   ; CHECK: bb.1:
   ; CHECK:   successors: %bb.4(0x80000000)
   ; CHECK:   tCMPi8 renamable $r1, 1, 14 /* CC::al */, $noreg, implicit-def $cpsr
@@ -528,7 +528,7 @@ body:             |
   ; CHECK:   successors: %bb.7(0x50000000), %bb.5(0x30000000)
   ; CHECK:   liveins: $r0, $r1, $r2, $r3, $r4, $r8, $r9, $r10, $r12
   ; CHECK:   renamable $lr = t2WhileLoopStartLR killed renamable $r9, %bb.5, implicit-def dead $cpsr
-  ; CHECK:   tB %bb.7, 14 /* CC::al */, $noreg
+  ; CHECK:   t2B %bb.7, 14 /* CC::al */, $noreg
   ; CHECK: bb.5:
   ; CHECK:   successors: %bb.2(0x04000000), %bb.6(0x7c000000)
   ; CHECK:   liveins: $r0, $r1, $r2, $r3, $r4, $r8, $r9, $r10, $r12
@@ -537,7 +537,7 @@ body:             |
   ; CHECK:   tCMPr renamable $r4, renamable $r1, 14 /* CC::al */, $noreg, implicit-def $cpsr
   ; CHECK:   renamable $r10 = t2ADDri killed renamable $r10, 1, 14 /* CC::al */, $noreg, $noreg
   ; CHECK:   t2Bcc %bb.2, 0 /* CC::eq */, killed $cpsr
-  ; CHECK:   tB %bb.6, 14 /* CC::al */, $noreg
+  ; CHECK:   t2B %bb.6, 14 /* CC::al */, $noreg
   ; CHECK: bb.7:
   ; CHECK:   successors: %bb.8(0x80000000)
   ; CHECK:   liveins: $r0, $r1, $r2, $r3, $r4, $r8, $r9, $r10, $r12