[PATCH] D101499: [X32][CET] Fix handling of indirect branches

Harald van Dijk via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 28 16:59:55 PDT 2021


hvdijk created this revision.
hvdijk added reviewers: craig.topper, MaskRay.
Herald added subscribers: pengfei, hiraditya.
hvdijk requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

As X32 uses 32-bit pointers without having 32-bit indirect branch instructions, we need to fix up indirect branches by extending the branch targets to 64 bits. This was already done for BRIND but not yet for NT_BRIND. The same logic works for both, so this applies that existing logic to NT_BRIND as well.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D101499

Files:
  llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
  llvm/test/CodeGen/X86/indirect-branch-tracking.ll


Index: llvm/test/CodeGen/X86/indirect-branch-tracking.ll
===================================================================
--- llvm/test/CodeGen/X86/indirect-branch-tracking.ll
+++ llvm/test/CodeGen/X86/indirect-branch-tracking.ll
@@ -1,4 +1,5 @@
 ; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefix=ALL --check-prefix=X86_64
+; RUN: llc -mtriple=x86_64-unknown-unknown-gnux32 < %s | FileCheck %s --check-prefix=ALL --check-prefix=X86_64
 ; RUN: llc -mtriple=i386-unknown-unknown < %s | FileCheck %s --check-prefix=ALL --check-prefix=X86
 ; FIXME: Fix machine verifier issues and remove -verify-machineinstrs=0. PR39439.
 ; RUN: llc -mtriple i386-windows-gnu -exception-model sjlj -verify-machineinstrs=0 < %s | FileCheck %s --check-prefix=SJLJ
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
===================================================================
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -4737,7 +4737,8 @@
     }
     break;
   }
-  case ISD::BRIND: {
+  case ISD::BRIND:
+  case X86ISD::NT_BRIND: {
     if (Subtarget->isTargetNaCl())
       // NaCl has its own pass where jmp %r32 are converted to jmp %r64. We
       // leave the instruction alone.
@@ -4749,7 +4750,7 @@
       SDValue Target = Node->getOperand(1);
       assert(Target.getValueType() == MVT::i32 && "Unexpected VT!");
       SDValue ZextTarget = CurDAG->getZExtOrTrunc(Target, dl, MVT::i64);
-      SDValue Brind = CurDAG->getNode(ISD::BRIND, dl, MVT::Other,
+      SDValue Brind = CurDAG->getNode(Opcode, dl, MVT::Other,
                                       Node->getOperand(0), ZextTarget);
       ReplaceNode(Node, Brind.getNode());
       SelectCode(ZextTarget.getNode());


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D101499.341340.patch
Type: text/x-patch
Size: 1742 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210428/fa2dc8b0/attachment.bin>


More information about the llvm-commits mailing list