[PATCH] D101062: [AArch64][SVE] Better utilisation of immediate forms for bitwise/arith intrinsics

[Bradley Smith via Phabricator via llvm-commits]

bsmith added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:13865
+static bool isAllActivePredicate(SDValue N) {
+  // Matches AArch64DAGToDAGISel::SelectAllActivePredicate().
+  unsigned NumElts = N.getValueType().getVectorMinNumElements();
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I very much dislike the blatant duplication of this function between here and ISelDAGToDAG, however I couldn't find anywhere sensible to share code between the two (and there is already a comment like this elsewhere in this file). Any pointers for a suitable place for this function would be much appreciated!


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D101062/new/

https://reviews.llvm.org/D101062