[PATCH] D101246: [RISCV] Select 5 bit immediate for VSETIVLI during isel rather than peepholing in the custom inserter.

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck added a comment.

LGTM!



================
Comment at: llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h:121
+  OPERAND_LAST_RISCV_IMM = OPERAND_UIMMLOG2XLEN,
+  OPERAND_AVL,
 };
----------------
Should we comment what this is since it's not as obvious as the IMMs above? Or is it expected that people look to the tablgen `Operand` definition?


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  https://reviews.llvm.org/D101246/new/

https://reviews.llvm.org/D101246