[llvm] f69adfb - [X86][AMX][NFC] Add more comments and remove unnecessary check found by Clocwork

[via llvm-commits]

Author: Wang, Pengfei
Date: 2021-04-28T16:35:17+08:00
New Revision: f69adfb87f9924c6a1920cff95ace3df17623356

URL: https://github.com/llvm/llvm-project/commit/f69adfb87f9924c6a1920cff95ace3df17623356
DIFF: https://github.com/llvm/llvm-project/commit/f69adfb87f9924c6a1920cff95ace3df17623356.diff

LOG: [X86][AMX][NFC] Add more comments and remove unnecessary check found by Clocwork

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86PreTileConfig.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/X86/X86PreTileConfig.cpp b/llvm/lib/Target/X86/X86PreTileConfig.cpp
index 9164dfd59cf2..2b3a7ac01911 100644
--- a/llvm/lib/Target/X86/X86PreTileConfig.cpp
+++ b/llvm/lib/Target/X86/X86PreTileConfig.cpp
@@ -71,9 +71,13 @@ struct MIRef {
   }
   bool operator!=(const MIRef &RHS) const { return !(*this == RHS); }
   bool operator<(const MIRef &RHS) const {
+    // Comparison between 
diff erent BBs happens when inserting a MIRef into set.
+    // So we compare MBB first to make the insertion happy.
     return MBB < RHS.MBB || (MBB == RHS.MBB && Pos < RHS.Pos);
   }
   bool operator>(const MIRef &RHS) const {
+    // Comparison between 
diff erent BBs happens when inserting a MIRef into set.
+    // So we compare MBB first to make the insertion happy.
     return MBB > RHS.MBB || (MBB == RHS.MBB && Pos > RHS.Pos);
   }
 };
@@ -205,8 +209,9 @@ void X86PreTileConfig::collectShapeInfo(MachineInstr &MI) {
   while (!WorkList.empty()) {
     Register R = WorkList.pop_back_val();
     MachineInstr *DefMI = MRI->getVRegDef(R);
+    assert(DefMI && "R must has one define instruction");
     MachineBasicBlock *DefMBB = DefMI->getParent();
-    if (!DefMI || DefMI->isMoveImmediate() || !DefVisited.insert(DefMI).second)
+    if (DefMI->isMoveImmediate() || !DefVisited.insert(DefMI).second)
       continue;
     if (DefMI->isPHI()) {
       for (unsigned I = 1; I < DefMI->getNumOperands(); I += 2)