[PATCH] D100816: [AArch64][SVE] Lower index_vector to step_vector

[JunMa via Phabricator via llvm-commits]

junparser added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:13643
+    SDValue StepVector =
+        DAG.getNode(ISD::STEP_VECTOR, DL, N->getValueType(0), One);
+    SDValue Step = DAG.getNode(ISD::SPLAT_VECTOR, DL, N->getValueType(0), Op2);
----------------
paulwalker-arm wrote:
> You should be able to use Op2 directly and thus remove the need for the `SPLAT_VECTOR` and `MUL`.
Sounds reasonable to me, update later.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:13650
+  } else
+    return DAG.getNode(AArch64ISD::INDEX_VECTOR, DL, N->getValueType(0), Op1,
+                       Op2);
----------------
paulwalker-arm wrote:
> Is this a phased the rollout?  As in I'm assuming that this will ultimately be expressed in terms of `STEP_VECTOR` as well.
For non-constant op, we need lower index_vector into  mul(splat(op2) step_vector()) + splat(base), mul may be lower to shl, even combine as mla with add which may confused the codegen. I'm not sure whether it is worth to deal this.


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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100816/new/

https://reviews.llvm.org/D100816