[llvm] 134f3ba - [NFC][SimplifyCFG] Autogenerate check lines in few more tests
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 27 14:37:42 PDT 2021
Author: Roman Lebedev
Date: 2021-04-28T00:35:44+03:00
New Revision: 134f3ba3ae259f0d97eed2936a75510c5b4ff2b6
URL: https://github.com/llvm/llvm-project/commit/134f3ba3ae259f0d97eed2936a75510c5b4ff2b6
DIFF: https://github.com/llvm/llvm-project/commit/134f3ba3ae259f0d97eed2936a75510c5b4ff2b6.diff
LOG: [NFC][SimplifyCFG] Autogenerate check lines in few more tests
Added:
Modified:
llvm/test/Transforms/SimplifyCFG/Hexagon/switch-to-lookup-table.ll
llvm/test/Transforms/SimplifyCFG/no_speculative_loads_with_asan.ll
llvm/test/Transforms/SimplifyCFG/no_speculative_loads_with_tsan.ll
llvm/test/Transforms/SimplifyCFG/preserve-store-alignment.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/SimplifyCFG/Hexagon/switch-to-lookup-table.ll b/llvm/test/Transforms/SimplifyCFG/Hexagon/switch-to-lookup-table.ll
index afd6a66b6eef0..62146827398f3 100644
--- a/llvm/test/Transforms/SimplifyCFG/Hexagon/switch-to-lookup-table.ll
+++ b/llvm/test/Transforms/SimplifyCFG/Hexagon/switch-to-lookup-table.ll
@@ -1,29 +1,62 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -O2 < %s | FileCheck %s -check-prefix=ENABLE
; RUN: opt -S -hexagon-emit-lookup-tables=true -O2 < %s | FileCheck %s -check-prefix=ENABLE
; RUN: opt -S -hexagon-emit-lookup-tables=false -O2 < %s | FileCheck %s -check-prefix=DISABLE
-
-; ENABLE: @{{.*}} = private unnamed_addr constant [6 x i32] [i32 9, i32 20, i32 14, i32 22, i32 12, i32 5]
-; DISABLE-NOT: @{{.*}} = private unnamed_addr constant [6 x i32] [i32 9, i32 20, i32 14, i32 22, i32 12, i32 5]
-; DISABLE: = phi i32 [ 19, %{{.*}} ], [ 5, %{{.*}} ], [ 12, %{{.*}} ], [ 22, %{{.*}} ], [ 14, %{{.*}} ], [ 20, %{{.*}} ], [ 9, %{{.*}} ]
-
target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
target triple = "hexagon-unknown--elf"
; Function Attrs: noinline nounwind
define i32 @foo(i32 %x) #0 section ".tcm_text" {
+; ENABLE-LABEL: @foo(
+; ENABLE-NEXT: entry:
+; ENABLE-NEXT: [[TMP0:%.*]] = icmp ult i32 [[X:%.*]], 6
+; ENABLE-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
+; ENABLE: switch.lookup:
+; ENABLE-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [6 x i32], [6 x i32]* @switch.table.foo, i32 0, i32 [[X]]
+; ENABLE-NEXT: [[SWITCH_LOAD:%.*]] = load i32, i32* [[SWITCH_GEP]], align 4
+; ENABLE-NEXT: ret i32 [[SWITCH_LOAD]]
+; ENABLE: return:
+; ENABLE-NEXT: ret i32 19
+;
+; DISABLE-LABEL: @foo(
+; DISABLE-NEXT: entry:
+; DISABLE-NEXT: switch i32 [[X:%.*]], label [[SW_DEFAULT:%.*]] [
+; DISABLE-NEXT: i32 0, label [[RETURN:%.*]]
+; DISABLE-NEXT: i32 1, label [[SW_BB1:%.*]]
+; DISABLE-NEXT: i32 2, label [[SW_BB2:%.*]]
+; DISABLE-NEXT: i32 3, label [[SW_BB3:%.*]]
+; DISABLE-NEXT: i32 4, label [[SW_BB4:%.*]]
+; DISABLE-NEXT: i32 5, label [[SW_BB5:%.*]]
+; DISABLE-NEXT: ]
+; DISABLE: sw.bb1:
+; DISABLE-NEXT: br label [[RETURN]]
+; DISABLE: sw.bb2:
+; DISABLE-NEXT: br label [[RETURN]]
+; DISABLE: sw.bb3:
+; DISABLE-NEXT: br label [[RETURN]]
+; DISABLE: sw.bb4:
+; DISABLE-NEXT: br label [[RETURN]]
+; DISABLE: sw.bb5:
+; DISABLE-NEXT: br label [[RETURN]]
+; DISABLE: sw.default:
+; DISABLE-NEXT: br label [[RETURN]]
+; DISABLE: return:
+; DISABLE-NEXT: [[RETVAL_0:%.*]] = phi i32 [ 19, [[SW_DEFAULT]] ], [ 5, [[SW_BB5]] ], [ 12, [[SW_BB4]] ], [ 22, [[SW_BB3]] ], [ 14, [[SW_BB2]] ], [ 20, [[SW_BB1]] ], [ 9, [[ENTRY:%.*]] ]
+; DISABLE-NEXT: ret i32 [[RETVAL_0]]
+;
entry:
%retval = alloca i32, align 4
%x.addr = alloca i32, align 4
store i32 %x, i32* %x.addr, align 4
%0 = load i32, i32* %x.addr, align 4
switch i32 %0, label %sw.default [
- i32 0, label %sw.bb
- i32 1, label %sw.bb1
- i32 2, label %sw.bb2
- i32 3, label %sw.bb3
- i32 4, label %sw.bb4
- i32 5, label %sw.bb5
+ i32 0, label %sw.bb
+ i32 1, label %sw.bb1
+ i32 2, label %sw.bb2
+ i32 3, label %sw.bb3
+ i32 4, label %sw.bb4
+ i32 5, label %sw.bb5
]
sw.bb: ; preds = %entry
diff --git a/llvm/test/Transforms/SimplifyCFG/no_speculative_loads_with_asan.ll b/llvm/test/Transforms/SimplifyCFG/no_speculative_loads_with_asan.ll
index 7a4462d3e39e6..504cbaec759ce 100644
--- a/llvm/test/Transforms/SimplifyCFG/no_speculative_loads_with_asan.ll
+++ b/llvm/test/Transforms/SimplifyCFG/no_speculative_loads_with_asan.ll
@@ -1,8 +1,16 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S %s | FileCheck %s
; Make sure we don't speculate loads under AddressSanitizer.
@g = global i32 0, align 4
define i32 @TestNoAsan(i32 %cond) nounwind readonly uwtable {
+; CHECK-LABEL: @TestNoAsan(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[COND:%.*]], 0
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @g, align 4
+; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[TOBOOL]], i32 0, i32 [[TMP0]]
+; CHECK-NEXT: ret i32 [[SPEC_SELECT]]
+;
entry:
%tobool = icmp eq i32 %cond, 0
br i1 %tobool, label %return, label %if.then
@@ -14,13 +22,20 @@ if.then: ; preds = %entry
return: ; preds = %entry, %if.then
%retval = phi i32 [ %0, %if.then ], [ 0, %entry ]
ret i32 %retval
-; CHECK-LABEL: @TestNoAsan
-; CHECK: %[[LOAD:[^ ]*]] = load
-; CHECK: select{{.*}}[[LOAD]]
-; CHECK: ret i32
}
define i32 @TestAsan(i32 %cond) nounwind readonly uwtable sanitize_address {
+; CHECK-LABEL: @TestAsan(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[COND:%.*]], 0
+; CHECK-NEXT: br i1 [[TOBOOL]], label [[RETURN:%.*]], label [[IF_THEN:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @g, align 4
+; CHECK-NEXT: br label [[RETURN]]
+; CHECK: return:
+; CHECK-NEXT: [[RETVAL:%.*]] = phi i32 [ [[TMP0]], [[IF_THEN]] ], [ 0, [[ENTRY:%.*]] ]
+; CHECK-NEXT: ret i32 [[RETVAL]]
+;
entry:
%tobool = icmp eq i32 %cond, 0
br i1 %tobool, label %return, label %if.then
@@ -32,14 +47,20 @@ if.then: ; preds = %entry
return: ; preds = %entry, %if.then
%retval = phi i32 [ %0, %if.then ], [ 0, %entry ]
ret i32 %retval
-; CHECK-LABEL: @TestAsan
-; CHECK: br i1
-; CHECK: load i32, i32* @g
-; CHECK: br label
-; CHECK: ret i32
}
define i32 @TestHWAsan(i32 %cond) nounwind readonly uwtable sanitize_hwaddress {
+; CHECK-LABEL: @TestHWAsan(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[COND:%.*]], 0
+; CHECK-NEXT: br i1 [[TOBOOL]], label [[RETURN:%.*]], label [[IF_THEN:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @g, align 4
+; CHECK-NEXT: br label [[RETURN]]
+; CHECK: return:
+; CHECK-NEXT: [[RETVAL:%.*]] = phi i32 [ [[TMP0]], [[IF_THEN]] ], [ 0, [[ENTRY:%.*]] ]
+; CHECK-NEXT: ret i32 [[RETVAL]]
+;
entry:
%tobool = icmp eq i32 %cond, 0
br i1 %tobool, label %return, label %if.then
@@ -51,9 +72,4 @@ if.then: ; preds = %entry
return: ; preds = %entry, %if.then
%retval = phi i32 [ %0, %if.then ], [ 0, %entry ]
ret i32 %retval
-; CHECK-LABEL: @TestHWAsan
-; CHECK: br i1
-; CHECK: load i32, i32* @g
-; CHECK: br label
-; CHECK: ret i32
}
diff --git a/llvm/test/Transforms/SimplifyCFG/no_speculative_loads_with_tsan.ll b/llvm/test/Transforms/SimplifyCFG/no_speculative_loads_with_tsan.ll
index 302b9daadccf0..e401043af1fac 100644
--- a/llvm/test/Transforms/SimplifyCFG/no_speculative_loads_with_tsan.ll
+++ b/llvm/test/Transforms/SimplifyCFG/no_speculative_loads_with_tsan.ll
@@ -1,8 +1,16 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S %s | FileCheck %s
; Make sure we don't speculate loads under ThreadSanitizer.
@g = global i32 0, align 4
define i32 @TestNoTsan(i32 %cond) nounwind readonly uwtable {
+; CHECK-LABEL: @TestNoTsan(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[COND:%.*]], 0
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @g, align 4
+; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[TOBOOL]], i32 0, i32 [[TMP0]]
+; CHECK-NEXT: ret i32 [[SPEC_SELECT]]
+;
entry:
%tobool = icmp eq i32 %cond, 0
br i1 %tobool, label %return, label %if.then
@@ -14,13 +22,20 @@ if.then: ; preds = %entry
return: ; preds = %entry, %if.then
%retval = phi i32 [ %0, %if.then ], [ 0, %entry ]
ret i32 %retval
-; CHECK-LABEL: @TestNoTsan
-; CHECK: %[[LOAD:[^ ]*]] = load
-; CHECK: select{{.*}}[[LOAD]]
-; CHECK: ret i32
}
define i32 @TestTsan(i32 %cond) nounwind readonly uwtable sanitize_thread {
+; CHECK-LABEL: @TestTsan(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[COND:%.*]], 0
+; CHECK-NEXT: br i1 [[TOBOOL]], label [[RETURN:%.*]], label [[IF_THEN:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @g, align 4
+; CHECK-NEXT: br label [[RETURN]]
+; CHECK: return:
+; CHECK-NEXT: [[RETVAL:%.*]] = phi i32 [ [[TMP0]], [[IF_THEN]] ], [ 0, [[ENTRY:%.*]] ]
+; CHECK-NEXT: ret i32 [[RETVAL]]
+;
entry:
%tobool = icmp eq i32 %cond, 0
br i1 %tobool, label %return, label %if.then
@@ -32,9 +47,4 @@ if.then: ; preds = %entry
return: ; preds = %entry, %if.then
%retval = phi i32 [ %0, %if.then ], [ 0, %entry ]
ret i32 %retval
-; CHECK-LABEL: @TestTsan
-; CHECK: br i1
-; CHECK: load i32, i32* @g
-; CHECK: br label
-; CHECK: ret i32
}
diff --git a/llvm/test/Transforms/SimplifyCFG/preserve-store-alignment.ll b/llvm/test/Transforms/SimplifyCFG/preserve-store-alignment.ll
index 845e29cd62eae..32ec6f751599b 100644
--- a/llvm/test/Transforms/SimplifyCFG/preserve-store-alignment.ll
+++ b/llvm/test/Transforms/SimplifyCFG/preserve-store-alignment.ll
@@ -9,9 +9,9 @@
define i32 @align_both_equal() local_unnamed_addr {
; CHECK-LABEL: @align_both_equal(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS:%.*]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i64> [[TMP0]], <i64 1, i64 1>
-; CHECK-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+; CHECK-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
; CHECK-NEXT: [[TMP2:%.*]] = load i64, i64* @m, align 8
; CHECK-NEXT: [[AND:%.*]] = and i64 [[TMP2]], 1
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[AND]], 0
@@ -20,14 +20,16 @@ define i32 @align_both_equal() local_unnamed_addr {
; CHECK-NEXT: [[AND4:%.*]] = and i64 [[TMP2]], 2
; CHECK-NEXT: [[TOBOOL5:%.*]] = icmp eq i64 [[AND4]], 0
; CHECK-NEXT: [[TMP5:%.*]] = add nsw <2 x i64> [[TMP4]], <i64 1, i64 1>
-; CHECK-NEXT: [[DOT:%.*]] = select i1 [[TOBOOL5]], <2 x i64> [[TMP4]], <2 x i64> [[TMP5]]
+; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[TOBOOL5]], <2 x i64> [[TMP4]], <2 x i64> [[TMP5]]
; CHECK-NEXT: [[TMP6:%.*]] = xor i1 [[TOBOOL]], true
; CHECK-NEXT: [[TMP7:%.*]] = xor i1 [[TOBOOL5]], true
; CHECK-NEXT: [[TMP8:%.*]] = or i1 [[TMP6]], [[TMP7]]
; CHECK-NEXT: br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]]
-; CHECK: store <2 x i64> [[DOT]], <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+; CHECK: 9:
+; CHECK-NEXT: store <2 x i64> [[SPEC_SELECT]], <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
; CHECK-NEXT: br label [[TMP10]]
-; CHECK: ret i32 0
+; CHECK: 10:
+; CHECK-NEXT: ret i32 0
;
entry:
%0 = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
@@ -61,9 +63,9 @@ if.end9: ; preds = %if.end, %if.then6
define i32 @align_not_equal() local_unnamed_addr {
; CHECK-LABEL: @align_not_equal(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS:%.*]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i64> [[TMP0]], <i64 1, i64 1>
-; CHECK-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+; CHECK-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
; CHECK-NEXT: [[TMP2:%.*]] = load i64, i64* @m, align 8
; CHECK-NEXT: [[AND:%.*]] = and i64 [[TMP2]], 1
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[AND]], 0
@@ -72,14 +74,16 @@ define i32 @align_not_equal() local_unnamed_addr {
; CHECK-NEXT: [[AND4:%.*]] = and i64 [[TMP2]], 2
; CHECK-NEXT: [[TOBOOL5:%.*]] = icmp eq i64 [[AND4]], 0
; CHECK-NEXT: [[TMP5:%.*]] = add nsw <2 x i64> [[TMP4]], <i64 1, i64 1>
-; CHECK-NEXT: [[DOT:%.*]] = select i1 [[TOBOOL5]], <2 x i64> [[TMP4]], <2 x i64> [[TMP5]]
+; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[TOBOOL5]], <2 x i64> [[TMP4]], <2 x i64> [[TMP5]]
; CHECK-NEXT: [[TMP6:%.*]] = xor i1 [[TOBOOL]], true
; CHECK-NEXT: [[TMP7:%.*]] = xor i1 [[TOBOOL5]], true
; CHECK-NEXT: [[TMP8:%.*]] = or i1 [[TMP6]], [[TMP7]]
; CHECK-NEXT: br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]]
-; CHECK: store <2 x i64> [[DOT]], <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+; CHECK: 9:
+; CHECK-NEXT: store <2 x i64> [[SPEC_SELECT]], <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
; CHECK-NEXT: br label [[TMP10]]
-; CHECK: ret i32 0
+; CHECK: 10:
+; CHECK-NEXT: ret i32 0
;
entry:
%0 = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
@@ -113,9 +117,9 @@ if.end9: ; preds = %if.end, %if.then6
define i32 @align_single_zero() local_unnamed_addr {
; CHECK-LABEL: @align_single_zero(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS:%.*]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i64> [[TMP0]], <i64 1, i64 1>
-; CHECK-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+; CHECK-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
; CHECK-NEXT: [[TMP2:%.*]] = load i64, i64* @m, align 8
; CHECK-NEXT: [[AND:%.*]] = and i64 [[TMP2]], 1
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[AND]], 0
@@ -124,14 +128,16 @@ define i32 @align_single_zero() local_unnamed_addr {
; CHECK-NEXT: [[AND4:%.*]] = and i64 [[TMP2]], 2
; CHECK-NEXT: [[TOBOOL5:%.*]] = icmp eq i64 [[AND4]], 0
; CHECK-NEXT: [[TMP5:%.*]] = add nsw <2 x i64> [[TMP4]], <i64 1, i64 1>
-; CHECK-NEXT: [[DOT:%.*]] = select i1 [[TOBOOL5]], <2 x i64> [[TMP4]], <2 x i64> [[TMP5]]
+; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[TOBOOL5]], <2 x i64> [[TMP4]], <2 x i64> [[TMP5]]
; CHECK-NEXT: [[TMP6:%.*]] = xor i1 [[TOBOOL]], true
; CHECK-NEXT: [[TMP7:%.*]] = xor i1 [[TOBOOL5]], true
; CHECK-NEXT: [[TMP8:%.*]] = or i1 [[TMP6]], [[TMP7]]
; CHECK-NEXT: br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]]
-; CHECK: store <2 x i64> [[DOT]], <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+; CHECK: 9:
+; CHECK-NEXT: store <2 x i64> [[SPEC_SELECT]], <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
; CHECK-NEXT: br label [[TMP10]]
-; CHECK: ret i32 0
+; CHECK: 10:
+; CHECK-NEXT: ret i32 0
;
entry:
%0 = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
@@ -165,9 +171,9 @@ if.end9: ; preds = %if.end, %if.then6
define i32 @align_single_zero_second_greater_default() local_unnamed_addr {
; CHECK-LABEL: @align_single_zero_second_greater_default(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS:%.*]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i64> [[TMP0]], <i64 1, i64 1>
-; CHECK-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+; CHECK-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
; CHECK-NEXT: [[TMP2:%.*]] = load i64, i64* @m, align 8
; CHECK-NEXT: [[AND:%.*]] = and i64 [[TMP2]], 1
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[AND]], 0
@@ -176,14 +182,16 @@ define i32 @align_single_zero_second_greater_default() local_unnamed_addr {
; CHECK-NEXT: [[AND4:%.*]] = and i64 [[TMP2]], 2
; CHECK-NEXT: [[TOBOOL5:%.*]] = icmp eq i64 [[AND4]], 0
; CHECK-NEXT: [[TMP5:%.*]] = add nsw <2 x i64> [[TMP4]], <i64 1, i64 1>
-; CHECK-NEXT: [[DOT:%.*]] = select i1 [[TOBOOL5]], <2 x i64> [[TMP4]], <2 x i64> [[TMP5]]
+; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[TOBOOL5]], <2 x i64> [[TMP4]], <2 x i64> [[TMP5]]
; CHECK-NEXT: [[TMP6:%.*]] = xor i1 [[TOBOOL]], true
; CHECK-NEXT: [[TMP7:%.*]] = xor i1 [[TOBOOL5]], true
; CHECK-NEXT: [[TMP8:%.*]] = or i1 [[TMP6]], [[TMP7]]
; CHECK-NEXT: br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]]
-; CHECK: store <2 x i64> [[DOT]], <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 16
+; CHECK: 9:
+; CHECK-NEXT: store <2 x i64> [[SPEC_SELECT]], <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 16
; CHECK-NEXT: br label [[TMP10]]
-; CHECK: ret i32 0
+; CHECK: 10:
+; CHECK-NEXT: ret i32 0
;
entry:
%0 = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
@@ -217,9 +225,9 @@ if.end9: ; preds = %if.end, %if.then6
define i32 @align_both_zero() local_unnamed_addr {
; CHECK-LABEL: @align_both_zero(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS:%.*]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i64> [[TMP0]], <i64 1, i64 1>
-; CHECK-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+; CHECK-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
; CHECK-NEXT: [[TMP2:%.*]] = load i64, i64* @m, align 8
; CHECK-NEXT: [[AND:%.*]] = and i64 [[TMP2]], 1
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[AND]], 0
@@ -228,14 +236,16 @@ define i32 @align_both_zero() local_unnamed_addr {
; CHECK-NEXT: [[AND4:%.*]] = and i64 [[TMP2]], 2
; CHECK-NEXT: [[TOBOOL5:%.*]] = icmp eq i64 [[AND4]], 0
; CHECK-NEXT: [[TMP5:%.*]] = add nsw <2 x i64> [[TMP4]], <i64 1, i64 1>
-; CHECK-NEXT: [[DOT:%.*]] = select i1 [[TOBOOL5]], <2 x i64> [[TMP4]], <2 x i64> [[TMP5]]
+; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[TOBOOL5]], <2 x i64> [[TMP4]], <2 x i64> [[TMP5]]
; CHECK-NEXT: [[TMP6:%.*]] = xor i1 [[TOBOOL]], true
; CHECK-NEXT: [[TMP7:%.*]] = xor i1 [[TOBOOL5]], true
; CHECK-NEXT: [[TMP8:%.*]] = or i1 [[TMP6]], [[TMP7]]
; CHECK-NEXT: br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]]
-; CHECK: store <2 x i64> [[DOT]], <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 16
+; CHECK: 9:
+; CHECK-NEXT: store <2 x i64> [[SPEC_SELECT]], <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 16
; CHECK-NEXT: br label [[TMP10]]
-; CHECK: ret i32 0
+; CHECK: 10:
+; CHECK-NEXT: ret i32 0
;
entry:
%0 = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
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