[PATCH] D99284: [RegAllocFast] properly handle STATEPOINT instruction.
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 27 10:27:02 PDT 2021
arsenm added inline comments.
================
Comment at: llvm/test/CodeGen/X86/statepoint-fastregalloc.mir:25-66
+---
+name: test_relocate
+alignment: 16
+exposesReturnsTwice: false
+legalized: false
+regBankSelected: false
+selected: false
----------------
dantrushin wrote:
> arsenm wrote:
> > arsenm wrote:
> > > Don't need most of this
> > Can you craft a testcase for multiple regmasks? Other than that LGTM
> I don't know any instruction which can have multiple reg masks.
> I can try to add another arbitrary reg mask to STATEPOINT instruction in this test and see if it'll work (and will pass through verifier).
> Would it be OK?
>
Regmasks are treated like implicit operands, so you can freely add them to any instruction. You could take a NOP and add whatever implicit uses/defs and regmasks you want
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D99284/new/
https://reviews.llvm.org/D99284
More information about the llvm-commits
mailing list