[PATCH] D101366: [PowerPC][Bug] Fix Bug in Stack Frame Update Code

[Stefan Pintilie via Phabricator via llvm-commits]

stefanp created this revision.
stefanp added reviewers: nemanjai, sfertile.
Herald added subscribers: shchenz, kbarton, hiraditya, qcolombet.
stefanp requested review of this revision.
Herald added a project: LLVM.

The stack frame update code does not take into consideration spilling
to registers for callee saved registers. The option -ppc-enable-pe-vector-spills
turns on spilling to registers for callee saved registers and may expose a bug
in the code that moves a stack frame pointer update instruction.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D101366

Files:
  llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
  llvm/test/CodeGen/PowerPC/stack_pointer_vec_spills.mir


Index: llvm/test/CodeGen/PowerPC/stack_pointer_vec_spills.mir
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/stack_pointer_vec_spills.mir
@@ -0,0 +1,41 @@
+# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 \
+# RUN:     -start-before=prologepilog -ppc-enable-pe-vector-spills \
+# RUN:     -ppc-asm-full-reg-names -verify-machineinstrs %s -o - | FileCheck %s
+
+---
+name:            MixedSpill
+alignment:       16
+tracksRegLiveness: true
+liveins:
+body:             |
+  bb.0.entry:
+    $r14 = IMPLICIT_DEF
+    $f14 = IMPLICIT_DEF
+    $lr8 = IMPLICIT_DEF
+    BLR8 implicit undef $lr8, implicit undef $rm
+
+# CHECK-LABEL: MixedSpill
+# CHECK:       stdu r1, -176(r1)
+# CHECK:       stfd f14, 32(r1)
+# CHECK:       mtvsrd vs32, r14 
+# CHECK:       lfd f14, 32(r1)
+# CHECK:       addi r1, r1, 176
+# CHECK:       blr
+...
+---
+name:            NoStackUpdate
+alignment:       16
+tracksRegLiveness: true
+liveins:
+body:             |
+  bb.0.entry:
+    $r14 = IMPLICIT_DEF
+    $f14 = IMPLICIT_DEF
+    BLR8 implicit undef $lr8, implicit undef $rm
+
+# CHECK-LABEL: NoStackUpdate
+# CHECK-NOT:   stdu
+# CHECK:       mtvsrd vs32, r14
+# CHECK:       mfvsrd r14, vs32
+# CHECK:       blr
+...
Index: llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
@@ -733,6 +733,22 @@
   if (stackUpdateCanBeMoved(MF)) {
     const std::vector<CalleeSavedInfo> &Info = MFI.getCalleeSavedInfo();
     for (CalleeSavedInfo CSI : Info) {
+      // If the callee saved register is spilled to a register instead of the
+      // stack then the spill no longer uses the stack pointer.
+      // This can lead to two consequences:
+      // 1) We no longer need to update the stack because the function does not
+      //    spill any callee saved registers to stack.
+      // 2) We have a situation where we still have to update the stack pointer
+      //    even though some registers are spilled to other registers. In
+      //    this case the current code moves the stack update to an incorrect
+      //    position.
+      // In either case we should abort moving the stack update operation.
+      if (CSI.isSpilledToReg()) {
+        StackUpdateLoc = MBBI;
+        MovingStackUpdateDown = false;
+        break;
+      }
+
       int FrIdx = CSI.getFrameIdx();
       // If the frame index is not negative the callee saved info belongs to a
       // stack object that is not a fixed stack object. We ignore non-fixed
@@ -1621,6 +1637,12 @@
   if (stackUpdateCanBeMoved(MF)) {
     const std::vector<CalleeSavedInfo> & Info = MFI.getCalleeSavedInfo();
     for (CalleeSavedInfo CSI : Info) {
+      // If the callee saved register is spilled to another register abort the
+      // stack update movement.
+      if (CSI.isSpilledToReg()) {
+        StackUpdateLoc = MBBI;
+        break;
+      }
       int FrIdx = CSI.getFrameIdx();
       // If the frame index is not negative the callee saved info belongs to a
       // stack object that is not a fixed stack object. We ignore non-fixed


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