[PATCH] D100102: [VPlan] Use incoming VPValue to detect in-loop reductions (NFC).

Tue Apr 27 06:20:41 PDT 2021

Ayal added a comment.

Reducing the coupling with the cost model by using information directly in VPlan is great. Have a few comments.

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Comment at: llvm/lib/Transforms/Vectorize/LoopVectorize.cpp:4282
+  bool IsInLoopReductionPhi = PhiR->getNumOperands() == 2 &&
+                              isa<VPReductionRecipe>(PhiR->getOperand(1));

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number of operands must be 2, right?

this may be fragile, if some (cast?) vpinstruction is introduced between the VPReductionRecipe and the header phi it feeds? Since in-loop-reduction phi's require special code-gen handling, perhaps their recipes should be marked as such?

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Comment at: llvm/lib/Transforms/Vectorize/LoopVectorize.cpp:4693
+        (State.VF.isScalar()) || (PhiR->getNumOperands() == 2 &&
+                                  isa<VPReductionRecipe>(PhiR->getOperand(1)));
     Type *VecTy =
----------------
ditto

================
Comment at: llvm/lib/Transforms/Vectorize/LoopVectorize.cpp:9036
   // and the live-out instruction of each reduction, at the end of the latch.
   if (CM.foldTailByMasking() && !Legal->getReductionVars().empty()) {
     Builder.setInsertPoint(VPBB);
----------------
Perhaps RecipeBuilder should allow checking if it has any (in-loop) reduction phi's, and iterate over them?

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100102/new/

https://reviews.llvm.org/D100102