[PATCH] D101349: AArch64: support i128 cmpxchg in GlobalISel.

[Tim Northover via Phabricator via llvm-commits]

t.p.northover created this revision.
t.p.northover added reviewers: paquette, aemerson.
Herald added subscribers: danielkiss, jfb, hiraditya, kristof.beyls, rovka, mcrosier.
t.p.northover requested review of this revision.
Herald added a project: LLVM.

Most operations get expanded to `cmpxchg` at i128 because it's the only primitive we have. So this is the bulk of the support needed for all i128 atomics.

There are three essentially different cases to handle:

- -O0, no LSE. The IR is expanded to ldxp/stxp and we need patterns & code to select them.
- -O1, no LSE. We get G_ATOMIC_CMPXCHG, and need to produce CMP_SWAP_N pseudos. The registers are all 64-bit so this is easy in the existing framework.
- LSE. We get G_ATOMIC_CMPXCHG and need to produce a CASP instruction with XSeqPair registers.

The last case is by far the hardest, and and adds 128-bit GPR support as a byproduct. The only way I could get it through all phases (and I tried many variants) was:

  G_UNMERGE
  REG_SEQUENCE
  CAS
  G_EXTRACT
  G_MERGE

The merge/unmerge pair are needed to cancel out similar in surrounding instructions, but then the `REG_SEQUENCE` and `G_EXTRACT` are needed to put the values back into 128-bit vregs again.

Unfortunately the `G_EXTRACT` had to be handled with quite a nasty hack in RegisterBankInfo. Please tell me if anyone has any better ideas, but I couldn't make a RegBank stick from Legalizer to there, or think of any other way to check for an int op.


https://reviews.llvm.org/D101349

Files:
  llvm/lib/Target/AArch64/AArch64GenRegisterBankInfo.def
  llvm/lib/Target/AArch64/AArch64InstrGISel.td
  llvm/lib/Target/AArch64/AArch64RegisterBanks.td
  llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
  llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
  llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h
  llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
  llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.h
  llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll
  llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir

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