[PATCH] D100641: [NFC][SVE] Add tests for inserting subvectors into illegal scalable vectors
Sander de Smalen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 26 07:24:02 PDT 2021
sdesmalen accepted this revision.
sdesmalen added a comment.
This revision is now accepted and ready to land.
LGTM
================
Comment at: llvm/test/CodeGen/AArch64/sve-insert-vector.ll:205-207
+; CHECK-NEXT: ret
+ %sv0 = load <2 x i64>, <2 x i64>* %psv0
+ %sv1 = load <2 x i64>, <2 x i64>* %psv1
----------------
nit: can these be passed as arguments?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D100641/new/
https://reviews.llvm.org/D100641
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