[PATCH] D40008: [X86][TTI] update costs of interleaved load\store of i64\double

[Roman Lebedev via Phabricator via llvm-commits]

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@RKSimon @magabari I'd like to add some more tuples, but i have a question: how are the costs actually derived?
For example, the assembly for interleaved load of i16 w/ stride 2: https://godbolt.org/z/hjb3d5x6E
What's it cost? I'm guessing it's not just `10`, aka the instruction count excluding the loads/stores?
Is it 4 from `Block RThroughput: 3.3` from MCA: https://godbolt.org/z/3eKcrdP4f ?
Which CPU should be used for these numbers?


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