[llvm] f68cd33 - [PhaseOrdering] Add PR32544 test coverage
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sun Apr 25 03:05:53 PDT 2021
Author: Simon Pilgrim
Date: 2021-04-25T11:05:32+01:00
New Revision: f68cd33567857769751f3ccd10252d8ce1357def
URL: https://github.com/llvm/llvm-project/commit/f68cd33567857769751f3ccd10252d8ce1357def
DIFF: https://github.com/llvm/llvm-project/commit/f68cd33567857769751f3ccd10252d8ce1357def.diff
LOG: [PhaseOrdering] Add PR32544 test coverage
Added:
llvm/test/Transforms/PhaseOrdering/pr32544.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/Transforms/PhaseOrdering/pr32544.ll b/llvm/test/Transforms/PhaseOrdering/pr32544.ll
new file mode 100644
index 0000000000000..d0ade17b0a8e7
--- /dev/null
+++ b/llvm/test/Transforms/PhaseOrdering/pr32544.ll
@@ -0,0 +1,85 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -O3 -S < %s | FileCheck %s
+; RUN: opt -passes='default<O3>' -S < %s | FileCheck %s
+
+define void @foo(i1 %which, i32 %a, i32 %b, i64 *%result) {
+; CHECK-LABEL: @foo(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = sub i32 0, [[B:%.*]]
+; CHECK-NEXT: [[Z_V_P:%.*]] = select i1 [[WHICH:%.*]], i32 [[B]], i32 [[TMP0]]
+; CHECK-NEXT: [[Z_V:%.*]] = add i32 [[Z_V_P]], [[A:%.*]]
+; CHECK-NEXT: [[Z:%.*]] = zext i32 [[Z_V]] to i64
+; CHECK-NEXT: [[C:%.*]] = load i64, i64* [[RESULT:%.*]], align 4
+; CHECK-NEXT: [[VALUE:%.*]] = add i64 [[C]], [[Z]]
+; CHECK-NEXT: store i64 [[VALUE]], i64* [[RESULT]], align 4
+; CHECK-NEXT: ret void
+;
+entry:
+ %x = add i32 %a, %b
+ %x2 = zext i32 %x to i64
+ br i1 %which, label %final, label %delay
+
+delay:
+ %y = sub i32 %a, %b
+ %y2 = zext i32 %y to i64
+ br label %final
+
+final:
+ %z = phi i64 [ %x2, %entry ], [ %y2, %delay ]
+ %c = load i64, i64* %result
+ %value = add i64 %z, %c
+ store i64 %value, i64* %result
+ ret void
+}
+
+define void @bar(i1 %which, i32 %a, i32 %b, i64 *%result) {
+; CHECK-LABEL: @bar(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = sub i32 0, [[B:%.*]]
+; CHECK-NEXT: [[SPEC_SELECT_P:%.*]] = select i1 [[WHICH:%.*]], i32 [[B]], i32 [[TMP0]]
+; CHECK-NEXT: [[SPEC_SELECT:%.*]] = add i32 [[SPEC_SELECT_P]], [[A:%.*]]
+; CHECK-NEXT: [[Z2:%.*]] = zext i32 [[SPEC_SELECT]] to i64
+; CHECK-NEXT: [[C:%.*]] = load i64, i64* [[RESULT:%.*]], align 4
+; CHECK-NEXT: [[VALUE:%.*]] = add i64 [[C]], [[Z2]]
+; CHECK-NEXT: store i64 [[VALUE]], i64* [[RESULT]], align 4
+; CHECK-NEXT: ret void
+;
+entry:
+ %x = add i32 %a, %b
+ br i1 %which, label %final, label %delay
+
+delay:
+ %y = sub i32 %a, %b
+ br label %final
+
+final:
+ %z = phi i32 [ %x, %entry ], [ %y, %delay ]
+ %z2 = zext i32 %z to i64
+ %c = load i64, i64* %result
+ %value = add i64 %z2, %c
+ store i64 %value, i64* %result
+ ret void
+}
+
+define void @foo_opt(i1 %which, i32 %a, i32 %b, i64* nocapture %result) {
+; CHECK-LABEL: @foo_opt(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = sub i32 0, [[B:%.*]]
+; CHECK-NEXT: [[Z_V_P:%.*]] = select i1 [[WHICH:%.*]], i32 [[B]], i32 [[TMP0]]
+; CHECK-NEXT: [[Z_V:%.*]] = add i32 [[Z_V_P]], [[A:%.*]]
+; CHECK-NEXT: [[Z:%.*]] = zext i32 [[Z_V]] to i64
+; CHECK-NEXT: [[C:%.*]] = load i64, i64* [[RESULT:%.*]], align 4
+; CHECK-NEXT: [[VALUE:%.*]] = add i64 [[C]], [[Z]]
+; CHECK-NEXT: store i64 [[VALUE]], i64* [[RESULT]], align 4
+; CHECK-NEXT: ret void
+;
+entry:
+ %0 = sub i32 0, %b
+ %z.v.p = select i1 %which, i32 %b, i32 %0
+ %z.v = add i32 %z.v.p, %a
+ %z = zext i32 %z.v to i64
+ %c = load i64, i64* %result, align 4
+ %value = add i64 %c, %z
+ store i64 %value, i64* %result, align 4
+ ret void
+}
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