[PATCH] D100026: [X86] Support AMX fast register allocation
Xiang Zhang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Apr 24 18:48:47 PDT 2021
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG3b8ec86fd576: [X86] Support AMX fast register allocation (authored by xiangzhangllvm).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D100026/new/
https://reviews.llvm.org/D100026
Files:
llvm/include/llvm/CodeGen/Passes.h
llvm/include/llvm/CodeGen/TargetPassConfig.h
llvm/lib/CodeGen/TargetPassConfig.cpp
llvm/lib/Target/X86/CMakeLists.txt
llvm/lib/Target/X86/X86.h
llvm/lib/Target/X86/X86FastTileConfig.cpp
llvm/lib/Target/X86/X86LowerAMXIntrinsics.cpp
llvm/lib/Target/X86/X86LowerAMXType.cpp
llvm/lib/Target/X86/X86PreAMXConfig.cpp
llvm/lib/Target/X86/X86TargetMachine.cpp
llvm/test/CodeGen/X86/AMX/amx-configO0toO0.ll
llvm/test/CodeGen/X86/AMX/amx-configO2toO0-lower.ll
llvm/test/CodeGen/X86/AMX/amx-configO2toO0-precfg.ll
llvm/test/CodeGen/X86/AMX/amx-configO2toO0.ll
llvm/test/CodeGen/X86/AMX/amx-fast-tile-config.mir
llvm/test/CodeGen/X86/AMX/amx-low-intrinsics-no-amx-bitcast.ll
llvm/test/CodeGen/X86/AMX/amx-low-intrinsics.ll
llvm/test/CodeGen/X86/O0-pipeline.ll
llvm/tools/opt/opt.cpp
llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D100026.340323.patch
Type: text/x-patch
Size: 390118 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210425/8a8688e5/attachment-0001.bin>
More information about the llvm-commits
mailing list