[PATCH] D101216: [AArch64] Avoid generating LL/SC for atomicrmw before regalloc at -O0.
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 23 17:54:44 PDT 2021
efriedma created this revision.
efriedma added reviewers: t.p.northover, arsenm, rogfer01, mgorny.
Herald added subscribers: tmatheson, danielkiss, jfb, hiraditya, kristof.beyls.
efriedma requested review of this revision.
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Herald added a project: LLVM.
This is a retread of the issue we had in the past with cmpxchg: fast regalloc can generate spills in weird places, so the ll/sc sequence never terminates. To avoid this, don't use the early ll/sc expansion at -O0.
I didn't spend the time to implement individual instructions for each atomicrmw instruction; instead, it's just expanding to the known-good cmpxchg. This is inefficient, but not sure how much we care; we don't use these sequences with LSE or atomic outlining.
Fixes https://bugs.llvm.org/show_bug.cgi?id=48017
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D101216
Files:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
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