[llvm] 0764c8a - [Docs] Updated LLVM_TARGETS_TO_BUILD section in GettingStarted.rst

[via llvm-commits]

Author: Pooja Yadav
Date: 2021-04-24T00:31:43+05:30
New Revision: 0764c8af7631483fbfd2641ba58f450f00059588

URL: https://github.com/llvm/llvm-project/commit/0764c8af7631483fbfd2641ba58f450f00059588
DIFF: https://github.com/llvm/llvm-project/commit/0764c8af7631483fbfd2641ba58f450f00059588.diff

LOG: [Docs] Updated LLVM_TARGETS_TO_BUILD section in GettingStarted.rst

Updated LLVM_TARGETS_TO_BUILD  under https://llvm.org/docs/GettingStarted.html#local-llvm-configuration.

Differential Revision: https://reviews.llvm.org/D101101

Added: 
    

Modified: 
    llvm/docs/GettingStarted.rst

Removed: 
    


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diff  --git a/llvm/docs/GettingStarted.rst b/llvm/docs/GettingStarted.rst
index 48089297cb29..819b09b31d82 100644
--- a/llvm/docs/GettingStarted.rst
+++ b/llvm/docs/GettingStarted.rst
@@ -600,9 +600,9 @@ used by people developing LLVM.
 |                         | The default list is defined as                     |
 |                         | ``LLVM_ALL_TARGETS``, and can be set to include    |
 |                         | out-of-tree targets. The default value includes:   |
-|                         | ``AArch64, AMDGPU, ARM, BPF, Hexagon, Mips,        |
-|                         | MSP430, NVPTX, PowerPC, Sparc, SystemZ, X86,       |
-|                         | XCore``.                                           |
+|                         | ``AArch64, AMDGPU, ARM, AVR, BPF, Hexagon, Lanai,  |
+|                         | Mips, MSP430, NVPTX, PowerPC, RISCV, Sparc,        |
+|                         | SystemZ, WebAssembly, X86, XCore``.                |
 |                         |                                                    |
 +-------------------------+----------------------------------------------------+
 | LLVM_ENABLE_DOXYGEN     | Build doxygen-based documentation from the source  |