[PATCH] D101187: [MachineCSE] Prevent CSE of non-local convergent instrs
Michael Kitzan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 23 11:02:52 PDT 2021
mkitzan created this revision.
mkitzan added reviewers: rtereshin, dsanders.
Herald added a subscriber: hiraditya.
mkitzan requested review of this revision.
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Herald added a subscriber: llvm-commits.
At the moment, `MachineCSE` allows CSE-ing convergent instrs which are non-local to each other. This can cause illegal codegen as convergent instrs are control flow dependent. The patch prevents non-local CSE of convergent instrs by adding a check in `isProfitableToCSE` and rejecting CSE-ing if we're considering CSE-ing non-local convergent instrs. We can still CSE convergent instrs which are in the same control flow scope, so the patch purposely does not make all convergent instrs non-CSE candidates in `isCSECandidate`.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D101187
Files:
llvm/lib/CodeGen/MachineCSE.cpp
Index: llvm/lib/CodeGen/MachineCSE.cpp
===================================================================
--- llvm/lib/CodeGen/MachineCSE.cpp
+++ llvm/lib/CodeGen/MachineCSE.cpp
@@ -433,6 +433,11 @@
MachineBasicBlock *CSBB, MachineInstr *MI) {
// FIXME: Heuristics that works around the lack the live range splitting.
+ MachineBasicBlock *BB = MI->getParent();
+ // Prevent CSE-ing non-local convergent instructions.
+ if (MI->isConvergent() && CSBB != BB)
+ return false;
+
// If CSReg is used at all uses of Reg, CSE should not increase register
// pressure of CSReg.
bool MayIncreasePressure = true;
@@ -455,7 +460,6 @@
// an immediate predecessor. We don't want to increase register pressure and
// end up causing other computation to be spilled.
if (TII->isAsCheapAsAMove(*MI)) {
- MachineBasicBlock *BB = MI->getParent();
if (CSBB != BB && !CSBB->isSuccessor(BB))
return false;
}
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