[PATCH] D101133: [llvm-readelf] Elf e_machine description fix for EM_CR16

[Sergio Perez Gonzalez via Phabricator via llvm-commits]

sperezglz created this revision.
sperezglz added a reviewer: MaskRay.
Herald added subscribers: rupprecht, hiraditya, emaste.
Herald added a reviewer: jhenderson.
sperezglz requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

The textual description for EM_CR16 machine type says "Xilinx MicroBlaze", this doesn't seem right and/or intentional. I created this patch to add the right description if desired.


https://reviews.llvm.org/D101133

Files:
  llvm/include/llvm/BinaryFormat/ELF.h
  llvm/lib/ObjectYAML/ELFYAML.cpp
  llvm/test/tools/llvm-readobj/ELF/file-header-machine-types.test
  llvm/tools/llvm-readobj/ELFDumper.cpp


Index: llvm/tools/llvm-readobj/ELFDumper.cpp
===================================================================
--- llvm/tools/llvm-readobj/ELFDumper.cpp
+++ llvm/tools/llvm-readobj/ELFDumper.cpp
@@ -1140,7 +1140,7 @@
   ENUM_ENT(EM_METAG,         "Imagination Technologies Meta processor architecture"),
   ENUM_ENT(EM_MCST_ELBRUS,   "MCST Elbrus general purpose hardware architecture"),
   ENUM_ENT(EM_ECOG16,        "Cyan Technology eCOG16 family"),
-  ENUM_ENT(EM_CR16,          "Xilinx MicroBlaze"),
+  ENUM_ENT(EM_CR16,          "National Semiconductor CompactRISC 16-bit processor"),
   ENUM_ENT(EM_ETPU,          "Freescale Extended Time Processing Unit"),
   ENUM_ENT(EM_SLE9X,         "Infineon Technologies SLE9X core"),
   ENUM_ENT(EM_L10M,          "EM_L10M"),
@@ -1150,6 +1150,7 @@
   ENUM_ENT(EM_STM8,          "STMicroeletronics STM8 8-bit microcontroller"),
   ENUM_ENT(EM_TILE64,        "Tilera TILE64 multicore architecture family"),
   ENUM_ENT(EM_TILEPRO,       "Tilera TILEPro multicore architecture family"),
+  ENUM_ENT(EM_MICROBLAZE,    "Xilinx MicroBlaze 32-bit RISC soft processor core"),
   ENUM_ENT(EM_CUDA,          "NVIDIA CUDA architecture"),
   ENUM_ENT(EM_TILEGX,        "Tilera TILE-Gx multicore architecture family"),
   ENUM_ENT(EM_CLOUDSHIELD,   "EM_CLOUDSHIELD"),
Index: llvm/test/tools/llvm-readobj/ELF/file-header-machine-types.test
===================================================================
--- llvm/test/tools/llvm-readobj/ELF/file-header-machine-types.test
+++ llvm/test/tools/llvm-readobj/ELF/file-header-machine-types.test
@@ -400,7 +400,7 @@
 # RUN: llvm-readelf --file-headers %t.ecog16.o | FileCheck %s -DMACHINE="Cyan Technology eCOG16 family"
 
 # RUN: yaml2obj %s -o %t.cr16.o -D MACHINE=EM_CR16
-# RUN: llvm-readelf --file-headers %t.cr16.o | FileCheck %s -DMACHINE="Xilinx MicroBlaze"
+# RUN: llvm-readelf --file-headers %t.cr16.o | FileCheck %s -DMACHINE="National Semiconductor CompactRISC 16-bit processor"
 
 # RUN: yaml2obj %s -o %t.etpu.o -D MACHINE=EM_ETPU
 # RUN: llvm-readelf --file-headers %t.etpu.o | FileCheck %s -DMACHINE="Freescale Extended Time Processing Unit"
@@ -429,6 +429,9 @@
 # RUN: yaml2obj %s -o %t.tilepro.o -D MACHINE=EM_TILEPRO
 # RUN: llvm-readelf --file-headers %t.tilepro.o | FileCheck %s -DMACHINE="Tilera TILEPro multicore architecture family"
 
+# RUN: yaml2obj %s -o %t.microblaze.o -D MACHINE=EM_MICROBLAZE
+# RUN: llvm-readelf --file-headers %t.microblaze.o | FileCheck %s -DMACHINE="Xilinx MicroBlaze 32-bit RISC soft processor core"
+
 # RUN: yaml2obj %s -o %t.cuda.o -D MACHINE=EM_CUDA
 # RUN: llvm-readelf --file-headers %t.cuda.o | FileCheck %s -DMACHINE="NVIDIA CUDA architecture"
 
Index: llvm/lib/ObjectYAML/ELFYAML.cpp
===================================================================
--- llvm/lib/ObjectYAML/ELFYAML.cpp
+++ llvm/lib/ObjectYAML/ELFYAML.cpp
@@ -311,6 +311,7 @@
   ECase(EM_STM8);
   ECase(EM_TILE64);
   ECase(EM_TILEPRO);
+  ECase(EM_MICROBLAZE);
   ECase(EM_CUDA);
   ECase(EM_TILEGX);
   ECase(EM_CLOUDSHIELD);
Index: llvm/include/llvm/BinaryFormat/ELF.h
===================================================================
--- llvm/include/llvm/BinaryFormat/ELF.h
+++ llvm/include/llvm/BinaryFormat/ELF.h
@@ -281,6 +281,7 @@
   EM_STM8 = 186,          // STMicroeletronics STM8 8-bit microcontroller
   EM_TILE64 = 187,        // Tilera TILE64 multicore architecture family
   EM_TILEPRO = 188,       // Tilera TILEPro multicore architecture family
+  EM_MICROBLAZE = 189,    // Xilinx MicroBlaze 32-bit RISC soft processor core
   EM_CUDA = 190,          // NVIDIA CUDA architecture
   EM_TILEGX = 191,        // Tilera TILE-Gx multicore architecture family
   EM_CLOUDSHIELD = 192,   // CloudShield architecture family


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D101133.339866.patch
Type: text/x-patch
Size: 3751 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210423/a4dd7438/attachment.bin>