[PATCH] D101127: AMDGPU: Fix assert on inline asm on gfx90a

[Matt Arsenault via Phabricator via llvm-commits]

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This was assuming all mayLoad instructions have one def.


https://reviews.llvm.org/D101127

Files:
  llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
  llvm/test/CodeGen/AMDGPU/swdev282079.ll
  llvm/test/CodeGen/AMDGPU/swdev282079.mir


Index: llvm/test/CodeGen/AMDGPU/swdev282079.mir
===================================================================
--- llvm/test/CodeGen/AMDGPU/swdev282079.mir
+++ llvm/test/CodeGen/AMDGPU/swdev282079.mir
@@ -100,3 +100,18 @@
     S_ENDPGM 0
 
 ...
+
+# This would crash looking for a def in any mayLoad instruction
+---
+name: fold_inlineasm_def
+tracksRegLiveness: true
+body:             |
+  bb.0:
+
+    ; CHECK-LABEL: name: fold_inlineasm_def
+    ; CHECK: INLINEASM &"s_waitcnt vmcnt($0)", 41 /* sideeffect mayload isconvergent attdialect */, 13 /* imm */, 0
+    ; CHECK: S_ENDPGM 0
+    INLINEASM &"s_waitcnt vmcnt($0)", 41 /* sideeffect mayload isconvergent attdialect */, 13 /* imm */, 0
+    S_ENDPGM 0
+
+...
Index: llvm/test/CodeGen/AMDGPU/swdev282079.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/AMDGPU/swdev282079.ll
@@ -0,0 +1,13 @@
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a < %s
+
+define protected amdgpu_kernel void @foo(i64 addrspace(1)* %arg, i64 addrspace(1)* %arg1) {
+bb:
+  %tmp = addrspacecast i64* addrspace(5)* null to i64**
+  %tmp2 = call i64 @eggs(i64* undef) #1
+  %tmp3 = load i64*, i64** %tmp, align 8
+  %tmp4 = getelementptr inbounds i64, i64* %tmp3, i64 undef
+  store i64 %tmp2, i64* %tmp4, align 8
+  ret void
+}
+
+declare hidden i64 @eggs(i64*)
Index: llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+++ llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
@@ -1655,7 +1655,7 @@
 // Attempt to convert VGPR load to an AGPR load.
 bool SIFoldOperands::tryFoldLoad(MachineInstr &MI) {
   assert(MI.mayLoad());
-  if (!ST->hasGFX90AInsts() || !MI.getNumOperands())
+  if (!ST->hasGFX90AInsts() || MI.getNumExplicitDefs() != 1)
     return false;
 
   MachineOperand &Def = MI.getOperand(0);


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