[llvm] 9d1b2bc - [GVN] Regenerate test checks (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 22 13:38:50 PDT 2021
Author: Nikita Popov
Date: 2021-04-22T22:38:41+02:00
New Revision: 9d1b2bc7bf2f4c2cf601616ec7e17310c6748850
URL: https://github.com/llvm/llvm-project/commit/9d1b2bc7bf2f4c2cf601616ec7e17310c6748850
DIFF: https://github.com/llvm/llvm-project/commit/9d1b2bc7bf2f4c2cf601616ec7e17310c6748850.diff
LOG: [GVN] Regenerate test checks (NFC)
Added:
Modified:
llvm/test/Transforms/GVN/PRE/rle.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/GVN/PRE/rle.ll b/llvm/test/Transforms/GVN/PRE/rle.ll
index 46f29b0f10220..c474a096c27bd 100644
--- a/llvm/test/Transforms/GVN/PRE/rle.ll
+++ b/llvm/test/Transforms/GVN/PRE/rle.ll
@@ -1,14 +1,17 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -data-layout="e-p:32:32:32-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-n8:16:32" -basic-aa -gvn -S -dce | FileCheck %s
; RUN: opt < %s -data-layout="E-p:32:32:32-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-n32" -basic-aa -gvn -S -dce | FileCheck %s
;; Trivial RLE test.
define i32 @test0(i32 %V, i32* %P) {
+; CHECK-LABEL: @test0(
+; CHECK-NEXT: store i32 [[V:%.*]], i32* [[P:%.*]], align 4
+; CHECK-NEXT: ret i32 [[V]]
+;
store i32 %V, i32* %P
%A = load i32, i32* %P
ret i32 %A
-; CHECK-LABEL: @test0(
-; CHECK: ret i32 %V
}
@@ -18,6 +21,12 @@ define i32 @test0(i32 %V, i32* %P) {
;; PR5016
define i8 @crash0({i32, i32} %A, {i32, i32}* %P) {
+; CHECK-LABEL: @crash0(
+; CHECK-NEXT: store { i32, i32 } [[A:%.*]], { i32, i32 }* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = bitcast { i32, i32 }* [[P]] to i8*
+; CHECK-NEXT: [[Y:%.*]] = load i8, i8* [[X]], align 1
+; CHECK-NEXT: ret i8 [[Y]]
+;
store {i32, i32} %A, {i32, i32}* %P
%X = bitcast {i32, i32}* %P to i8*
%Y = load i8, i8* %X
@@ -27,6 +36,10 @@ define i8 @crash0({i32, i32} %A, {i32, i32}* %P) {
;; No PR filed, crashed in CaptureTracker.
declare void @helper()
define void @crash1() {
+; CHECK-LABEL: @crash1(
+; CHECK-NEXT: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* undef, i8* undef, i64 undef, i1 false) #[[ATTR6:[0-9]+]]
+; CHECK-NEXT: ret void
+;
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* undef, i8* undef, i64 undef, i1 false) nounwind
%tmp = load i8, i8* bitcast (void ()* @helper to i8*)
%x = icmp eq i8 %tmp, 15
@@ -41,143 +54,165 @@ define void @crash1() {
;; i32 -> f32 forwarding.
define float @coerce_mustalias1(i32 %V, i32* %P) {
+; CHECK-LABEL: @coerce_mustalias1(
+; CHECK-NEXT: store i32 [[V:%.*]], i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32 [[V]] to float
+; CHECK-NEXT: ret float [[TMP1]]
+;
store i32 %V, i32* %P
-
+
%P2 = bitcast i32* %P to float*
%A = load float, float* %P2
ret float %A
-; CHECK-LABEL: @coerce_mustalias1(
-; CHECK-NOT: load
-; CHECK: ret float
}
;; i32* -> float forwarding.
define float @coerce_mustalias2(i32* %V, i32** %P) {
+; CHECK-LABEL: @coerce_mustalias2(
+; CHECK-NEXT: store i32* [[V:%.*]], i32** [[P:%.*]], align 4
+; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint i32* [[V]] to i32
+; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32 [[TMP1]] to float
+; CHECK-NEXT: ret float [[TMP2]]
+;
store i32* %V, i32** %P
-
+
%P2 = bitcast i32** %P to float*
%A = load float, float* %P2
ret float %A
-; CHECK-LABEL: @coerce_mustalias2(
-; CHECK-NOT: load
-; CHECK: ret float
}
;; float -> i32* forwarding.
define i32* @coerce_mustalias3(float %V, float* %P) {
+; CHECK-LABEL: @coerce_mustalias3(
+; CHECK-NEXT: store float [[V:%.*]], float* [[P:%.*]], align 4
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast float [[V]] to i32
+; CHECK-NEXT: [[TMP2:%.*]] = inttoptr i32 [[TMP1]] to i32*
+; CHECK-NEXT: ret i32* [[TMP2]]
+;
store float %V, float* %P
-
+
%P2 = bitcast float* %P to i32**
%A = load i32*, i32** %P2
ret i32* %A
-; CHECK-LABEL: @coerce_mustalias3(
-; CHECK-NOT: load
-; CHECK: ret i32*
}
;; i32 -> f32 load forwarding.
define float @coerce_mustalias4(i32* %P, i1 %cond) {
+; CHECK-LABEL: @coerce_mustalias4(
+; CHECK-NEXT: [[A:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32 [[A]] to float
+; CHECK-NEXT: br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
+; CHECK: T:
+; CHECK-NEXT: ret float [[TMP1]]
+; CHECK: F:
+; CHECK-NEXT: ret float [[TMP1]]
+;
%A = load i32, i32* %P
-
+
%P2 = bitcast i32* %P to float*
%B = load float, float* %P2
br i1 %cond, label %T, label %F
T:
ret float %B
-
+
F:
%X = bitcast i32 %A to float
ret float %X
-; CHECK-LABEL: @coerce_mustalias4(
-; CHECK: %A = load i32, i32* %P
-; CHECK-NOT: load
-; CHECK: ret float
-; CHECK: F:
}
;; i32 -> i8 forwarding
define i8 @coerce_mustalias5(i32 %V, i32* %P) {
store i32 %V, i32* %P
-
+
%P2 = bitcast i32* %P to i8*
%A = load i8, i8* %P2
ret i8 %A
-; CHECK-LABEL: @coerce_mustalias5(
-; CHECK-NOT: load
-; CHECK: ret i8
}
;; i64 -> float forwarding
define float @coerce_mustalias6(i64 %V, i64* %P) {
store i64 %V, i64* %P
-
+
%P2 = bitcast i64* %P to float*
%A = load float, float* %P2
ret float %A
-; CHECK-LABEL: @coerce_mustalias6(
-; CHECK-NOT: load
-; CHECK: ret float
}
;; i64 -> i8* (32-bit) forwarding
define i8* @coerce_mustalias7(i64 %V, i64* %P) {
store i64 %V, i64* %P
-
+
%P2 = bitcast i64* %P to i8**
%A = load i8*, i8** %P2
ret i8* %A
-; CHECK-LABEL: @coerce_mustalias7(
-; CHECK-NOT: load
-; CHECK: ret i8*
}
; memset -> i16 forwarding.
define signext i16 @memset_to_i16_local(i16* %A) nounwind ssp {
+; CHECK-LABEL: @memset_to_i16_local(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CONV:%.*]] = bitcast i16* [[A:%.*]] to i8*
+; CHECK-NEXT: tail call void @llvm.memset.p0i8.i64(i8* [[CONV]], i8 1, i64 200, i1 false)
+; CHECK-NEXT: ret i16 257
+;
entry:
- %conv = bitcast i16* %A to i8*
+ %conv = bitcast i16* %A to i8*
tail call void @llvm.memset.p0i8.i64(i8* %conv, i8 1, i64 200, i1 false)
%arrayidx = getelementptr inbounds i16, i16* %A, i64 42
%tmp2 = load i16, i16* %arrayidx
ret i16 %tmp2
-; CHECK-LABEL: @memset_to_i16_local(
-; CHECK-NOT: load
-; CHECK: ret i16 257
}
; memset -> float forwarding.
define float @memset_to_float_local(float* %A, i8 %Val) nounwind ssp {
+; CHECK-LABEL: @memset_to_float_local(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CONV:%.*]] = bitcast float* [[A:%.*]] to i8*
+; CHECK-NEXT: tail call void @llvm.memset.p0i8.i64(i8* [[CONV]], i8 [[VAL:%.*]], i64 400, i1 false)
+; CHECK-NEXT: [[TMP0:%.*]] = zext i8 [[VAL]] to i32
+; CHECK-NEXT: [[TMP1:%.*]] = shl i32 [[TMP0]], 8
+; CHECK-NEXT: [[TMP2:%.*]] = or i32 [[TMP0]], [[TMP1]]
+; CHECK-NEXT: [[TMP3:%.*]] = shl i32 [[TMP2]], 16
+; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP2]], [[TMP3]]
+; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32 [[TMP4]] to float
+; CHECK-NEXT: ret float [[TMP5]]
+;
entry:
%conv = bitcast float* %A to i8* ; <i8*> [#uses=1]
tail call void @llvm.memset.p0i8.i64(i8* %conv, i8 %Val, i64 400, i1 false)
%arrayidx = getelementptr inbounds float, float* %A, i64 42 ; <float*> [#uses=1]
%tmp2 = load float, float* %arrayidx ; <float> [#uses=1]
ret float %tmp2
-; CHECK-LABEL: @memset_to_float_local(
-; CHECK-NOT: load
-; CHECK: zext
-; CHECK-NEXT: shl
-; CHECK-NEXT: or
-; CHECK-NEXT: shl
-; CHECK-NEXT: or
-; CHECK-NEXT: bitcast
-; CHECK-NEXT: ret float
}
;; non-local memset -> i16 load forwarding.
define i16 @memset_to_i16_nonlocal0(i16* %P, i1 %cond) {
+; CHECK-LABEL: @memset_to_i16_nonlocal0(
+; CHECK-NEXT: [[P3:%.*]] = bitcast i16* [[P:%.*]] to i8*
+; CHECK-NEXT: br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
+; CHECK: T:
+; CHECK-NEXT: tail call void @llvm.memset.p0i8.i64(i8* [[P3]], i8 1, i64 400, i1 false)
+; CHECK-NEXT: br label [[CONT:%.*]]
+; CHECK: F:
+; CHECK-NEXT: tail call void @llvm.memset.p0i8.i64(i8* [[P3]], i8 2, i64 400, i1 false)
+; CHECK-NEXT: br label [[CONT]]
+; CHECK: Cont:
+; CHECK-NEXT: [[A:%.*]] = phi i16 [ 514, [[F]] ], [ 257, [[T]] ]
+; CHECK-NEXT: ret i16 [[A]]
+;
%P3 = bitcast i16* %P to i8*
br i1 %cond, label %T, label %F
T:
tail call void @llvm.memset.p0i8.i64(i8* %P3, i8 1, i64 400, i1 false)
br label %Cont
-
+
F:
tail call void @llvm.memset.p0i8.i64(i8* %P3, i8 2, i64 400, i1 false)
br label %Cont
@@ -187,11 +222,6 @@ Cont:
%A = load i16, i16* %P2
ret i16 %A
-; CHECK-LABEL: @memset_to_i16_nonlocal0(
-; CHECK: Cont:
-; CHECK-NEXT: %A = phi i16 [ 514, %F ], [ 257, %T ]
-; CHECK-NOT: load
-; CHECK: ret i16 %A
}
@GCst = constant {i32, float, i32 } { i32 42, float 14., i32 97 }
@@ -199,28 +229,34 @@ Cont:
; memset -> float forwarding.
define float @memcpy_to_float_local(float* %A) nounwind ssp {
+; CHECK-LABEL: @memcpy_to_float_local(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CONV:%.*]] = bitcast float* [[A:%.*]] to i8*
+; CHECK-NEXT: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[CONV]], i8* bitcast ({ i32, float, i32 }* @GCst to i8*), i64 12, i1 false)
+; CHECK-NEXT: ret float 1.400000e+01
+;
entry:
%conv = bitcast float* %A to i8* ; <i8*> [#uses=1]
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %conv, i8* bitcast ({i32, float, i32 }* @GCst to i8*), i64 12, i1 false)
%arrayidx = getelementptr inbounds float, float* %A, i64 1 ; <float*> [#uses=1]
%tmp2 = load float, float* %arrayidx ; <float> [#uses=1]
ret float %tmp2
-; CHECK-LABEL: @memcpy_to_float_local(
-; CHECK-NOT: load
-; CHECK: ret float 1.400000e+01
}
; memcpy from address space 1
define float @memcpy_to_float_local_as1(float* %A) nounwind ssp {
+; CHECK-LABEL: @memcpy_to_float_local_as1(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CONV:%.*]] = bitcast float* [[A:%.*]] to i8*
+; CHECK-NEXT: tail call void @llvm.memcpy.p0i8.p1i8.i64(i8* [[CONV]], i8 addrspace(1)* bitcast ({ i32, float, i32 } addrspace(1)* @GCst_as1 to i8 addrspace(1)*), i64 12, i1 false)
+; CHECK-NEXT: ret float 1.400000e+01
+;
entry:
%conv = bitcast float* %A to i8* ; <i8*> [#uses=1]
tail call void @llvm.memcpy.p0i8.p1i8.i64(i8* %conv, i8 addrspace(1)* bitcast ({i32, float, i32 } addrspace(1)* @GCst_as1 to i8 addrspace(1)*), i64 12, i1 false)
%arrayidx = getelementptr inbounds float, float* %A, i64 1 ; <float*> [#uses=1]
%tmp2 = load float, float* %arrayidx ; <float> [#uses=1]
ret float %tmp2
-; CHECK-LABEL: @memcpy_to_float_local_as1(
-; CHECK-NOT: load
-; CHECK: ret float 1.400000e+01
}
;; non-local i32/float -> i8 load forwarding.
@@ -231,7 +267,7 @@ define i8 @coerce_mustalias_nonlocal0(i32* %P, i1 %cond) {
T:
store i32 42, i32* %P
br label %Cont
-
+
F:
store float 1.0, float* %P2
br label %Cont
@@ -240,11 +276,6 @@ Cont:
%A = load i8, i8* %P3
ret i8 %A
-; CHECK-LABEL: @coerce_mustalias_nonlocal0(
-; CHECK: Cont:
-; CHECK: %A = phi i8 [
-; CHECK-NOT: load
-; CHECK: ret i8 %A
}
@@ -256,7 +287,7 @@ define i8 @coerce_mustalias_nonlocal1(i32* %P, i1 %cond) {
T:
store i32 42, i32* %P
br label %Cont
-
+
F:
store float 1.0, float* %P2
br label %Cont
@@ -266,11 +297,6 @@ Cont:
%A = load i8, i8* %P3
ret i8 %A
-; CHECK-LABEL: @coerce_mustalias_nonlocal1(
-; CHECK: Cont:
-; CHECK: %A = phi i8 [
-; CHECK-NOT: load
-; CHECK: ret i8 %A
}
@@ -281,7 +307,7 @@ define i8 @coerce_mustalias_pre0(i32* %P, i1 %cond) {
T:
store i32 42, i32* %P
br label %Cont
-
+
F:
br label %Cont
@@ -289,13 +315,6 @@ Cont:
%A = load i8, i8* %P3
ret i8 %A
-; CHECK-LABEL: @coerce_mustalias_pre0(
-; CHECK: F:
-; CHECK: load i8, i8* %P3
-; CHECK: Cont:
-; CHECK: %A = phi i8 [
-; CHECK-NOT: load
-; CHECK: ret i8 %A
}
;;===----------------------------------------------------------------------===;;
@@ -307,15 +326,12 @@ Cont:
;; PR4216
define i8 @coerce_offset0(i32 %V, i32* %P) {
store i32 %V, i32* %P
-
+
%P2 = bitcast i32* %P to i8*
%P3 = getelementptr i8, i8* %P2, i32 2
%A = load i8, i8* %P3
ret i8 %A
-; CHECK-LABEL: @coerce_offset0(
-; CHECK-NOT: load
-; CHECK: ret i8
}
;; non-local i32/float -> i8 load forwarding.
@@ -327,7 +343,7 @@ define i8 @coerce_offset_nonlocal0(i32* %P, i1 %cond) {
T:
store i32 57005, i32* %P
br label %Cont
-
+
F:
store float 1.0, float* %P2
br label %Cont
@@ -336,23 +352,32 @@ Cont:
%A = load i8, i8* %P4
ret i8 %A
-; CHECK-LABEL: @coerce_offset_nonlocal0(
-; CHECK: Cont:
-; CHECK: %A = phi i8 [
-; CHECK-NOT: load
-; CHECK: ret i8 %A
}
;; non-local i32 -> i8 partial redundancy load forwarding.
define i8 @coerce_offset_pre0(i32* %P, i1 %cond) {
+; CHECK-LABEL: @coerce_offset_pre0(
+; CHECK-NEXT: [[P3:%.*]] = bitcast i32* [[P:%.*]] to i8*
+; CHECK-NEXT: [[P4:%.*]] = getelementptr i8, i8* [[P3]], i32 2
+; CHECK-NEXT: br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
+; CHECK: T:
+; CHECK-NEXT: store i32 42, i32* [[P]], align 4
+; CHECK-NEXT: br label [[CONT:%.*]]
+; CHECK: F:
+; CHECK-NEXT: [[A_PRE:%.*]] = load i8, i8* [[P4]], align 1
+; CHECK-NEXT: br label [[CONT]]
+; CHECK: Cont:
+; CHECK-NEXT: [[A:%.*]] = phi i8 [ [[A_PRE]], [[F]] ], [ 0, [[T]] ]
+; CHECK-NEXT: ret i8 [[A]]
+;
%P3 = bitcast i32* %P to i8*
%P4 = getelementptr i8, i8* %P3, i32 2
br i1 %cond, label %T, label %F
T:
store i32 42, i32* %P
br label %Cont
-
+
F:
br label %Cont
@@ -360,16 +385,24 @@ Cont:
%A = load i8, i8* %P4
ret i8 %A
-; CHECK-LABEL: @coerce_offset_pre0(
-; CHECK: F:
-; CHECK: load i8, i8* %P4
-; CHECK: Cont:
-; CHECK: %A = phi i8 [
-; CHECK-NOT: load
-; CHECK: ret i8 %A
}
define i32 @chained_load(i32** %p, i32 %x, i32 %y) {
+; CHECK-LABEL: @chained_load(
+; CHECK-NEXT: block1:
+; CHECK-NEXT: [[A:%.*]] = alloca i32*, align 4
+; CHECK-NEXT: [[Z:%.*]] = load i32*, i32** [[P:%.*]], align 4
+; CHECK-NEXT: store i32* [[Z]], i32** [[A]], align 4
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[BLOCK2:%.*]], label [[BLOCK3:%.*]]
+; CHECK: block2:
+; CHECK-NEXT: br label [[BLOCK4:%.*]]
+; CHECK: block3:
+; CHECK-NEXT: br label [[BLOCK4]]
+; CHECK: block4:
+; CHECK-NEXT: [[D:%.*]] = load i32, i32* [[Z]], align 4
+; CHECK-NEXT: ret i32 [[D]]
+;
block1:
%A = alloca i32*
@@ -379,8 +412,8 @@ block1:
br i1 %cmp, label %block2, label %block3
block2:
- %a = load i32*, i32** %p
- br label %block4
+ %a = load i32*, i32** %p
+ br label %block4
block3:
%b = load i32*, i32** %p
@@ -390,12 +423,7 @@ block4:
%c = load i32*, i32** %p
%d = load i32, i32* %c
ret i32 %d
-
-; CHECK-LABEL: @chained_load(
-; CHECK: %z = load i32*, i32** %p
-; CHECK-NOT: load
-; CHECK: %d = load i32, i32* %z
-; CHECK-NEXT: ret i32 %d
+
}
@@ -404,25 +432,47 @@ declare i1 @cond2() readonly
define i32 @phi_trans2() {
; CHECK-LABEL: @phi_trans2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[P:%.*]] = alloca i32, i32 400, align 4
+; CHECK-NEXT: br label [[F1:%.*]]
+; CHECK: F1:
+; CHECK-NEXT: [[A:%.*]] = phi i32 [ 1, [[ENTRY:%.*]] ], [ 2, [[F:%.*]] ]
+; CHECK-NEXT: [[COND2:%.*]] = call i1 @cond()
+; CHECK-NEXT: br i1 [[COND2]], label [[T1:%.*]], label [[TY:%.*]]
+; CHECK: T1:
+; CHECK-NEXT: [[P2:%.*]] = getelementptr i32, i32* [[P]], i32 [[A]]
+; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P2]], align 4
+; CHECK-NEXT: [[COND:%.*]] = call i1 @cond2()
+; CHECK-NEXT: br i1 [[COND]], label [[TX:%.*]], label [[F]]
+; CHECK: F:
+; CHECK-NEXT: [[P3:%.*]] = getelementptr i32, i32* [[P]], i32 2
+; CHECK-NEXT: store i32 17, i32* [[P3]], align 4
+; CHECK-NEXT: store i32 42, i32* [[P2]], align 4
+; CHECK-NEXT: br label [[F1]]
+; CHECK: TX:
+; CHECK-NEXT: ret i32 [[X]]
+; CHECK: TY:
+; CHECK-NEXT: ret i32 0
+;
entry:
%P = alloca i32, i32 400
br label %F1
-
+
F1:
%A = phi i32 [1, %entry], [2, %F]
%cond2 = call i1 @cond()
br i1 %cond2, label %T1, label %TY
-
+
T1:
%P2 = getelementptr i32, i32* %P, i32 %A
%x = load i32, i32* %P2
%cond = call i1 @cond2()
br i1 %cond, label %TX, label %F
-
+
F:
%P3 = getelementptr i32, i32* %P, i32 2
store i32 17, i32* %P3
-
+
store i32 42, i32* %P2 ; Provides "P[A]".
br label %F1
@@ -432,9 +482,7 @@ TX:
; executes once or 42 if it executes more than that, but we'd have to do
; loop restructuring to expose this, and GVN shouldn't do this sort of CFG
; transformation.
-
-; CHECK: TX:
-; CHECK: ret i32 %x
+
ret i32 %x
TY:
ret i32 0
@@ -442,13 +490,39 @@ TY:
define i32 @phi_trans3(i32* %p, i32 %x, i32 %y, i32 %z) {
; CHECK-LABEL: @phi_trans3(
+; CHECK-NEXT: block1:
+; CHECK-NEXT: [[CMPXY:%.*]] = icmp eq i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[CMPXY]], label [[BLOCK2:%.*]], label [[BLOCK3:%.*]]
+; CHECK: block2:
+; CHECK-NEXT: store i32 87, i32* [[P:%.*]], align 4
+; CHECK-NEXT: br label [[BLOCK4:%.*]]
+; CHECK: block3:
+; CHECK-NEXT: [[P2:%.*]] = getelementptr i32, i32* [[P]], i32 43
+; CHECK-NEXT: store i32 97, i32* [[P2]], align 4
+; CHECK-NEXT: br label [[BLOCK4]]
+; CHECK: block4:
+; CHECK-NEXT: [[D:%.*]] = phi i32 [ 87, [[BLOCK2]] ], [ 97, [[BLOCK3]] ]
+; CHECK-NEXT: br i1 [[CMPXY]], label [[BLOCK5:%.*]], label [[EXIT:%.*]]
+; CHECK: block5:
+; CHECK-NEXT: br i1 true, label [[BLOCK6:%.*]], label [[BLOCK5_EXIT_CRIT_EDGE:%.*]]
+; CHECK: block5.exit_crit_edge:
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: block6:
+; CHECK-NEXT: br i1 true, label [[BLOCK7:%.*]], label [[BLOCK6_EXIT_CRIT_EDGE:%.*]]
+; CHECK: block6.exit_crit_edge:
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: block7:
+; CHECK-NEXT: ret i32 [[D]]
+; CHECK: exit:
+; CHECK-NEXT: ret i32 -1
+;
block1:
%cmpxy = icmp eq i32 %x, %y
br i1 %cmpxy, label %block2, label %block3
block2:
- store i32 87, i32* %p
- br label %block4
+ store i32 87, i32* %p
+ br label %block4
block3:
%p2 = getelementptr i32, i32* %p, i32 43
@@ -458,25 +532,20 @@ block3:
block4:
%A = phi i32 [-1, %block2], [42, %block3]
br i1 %cmpxy, label %block5, label %exit
-
-; CHECK: block4:
-; CHECK-NEXT: %D = phi i32 [ 87, %block2 ], [ 97, %block3 ]
-; CHECK-NOT: load
+
block5:
%B = add i32 %A, 1
br i1 %cmpxy, label %block6, label %exit
-
+
block6:
%C = getelementptr i32, i32* %p, i32 %B
br i1 %cmpxy, label %block7, label %exit
-
+
block7:
%D = load i32, i32* %C
ret i32 %D
-
-; CHECK: block7:
-; CHECK-NEXT: ret i32 %D
+
exit:
ret i32 -1
@@ -484,10 +553,26 @@ exit:
define i8 @phi_trans4(i8* %p) {
; CHECK-LABEL: @phi_trans4(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[X3:%.*]] = getelementptr i8, i8* [[P:%.*]], i32 192
+; CHECK-NEXT: store i8 -64, i8* [[X3]], align 1
+; CHECK-NEXT: [[X:%.*]] = getelementptr i8, i8* [[P]], i32 4
+; CHECK-NEXT: [[Y:%.*]] = load i8, i8* [[X]], align 1
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[Y2:%.*]] = phi i8 [ [[Y]], [[ENTRY:%.*]] ], [ 0, [[LOOP]] ]
+; CHECK-NEXT: [[COND:%.*]] = call i1 @cond2()
+; CHECK-NEXT: [[Z:%.*]] = bitcast i8* [[X3]] to i32*
+; CHECK-NEXT: store i32 0, i32* [[Z]], align 4
+; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[OUT:%.*]]
+; CHECK: out:
+; CHECK-NEXT: [[R:%.*]] = add i8 [[Y]], [[Y2]]
+; CHECK-NEXT: ret i8 [[R]]
+;
entry:
%X3 = getelementptr i8, i8* %p, i32 192
store i8 192, i8* %X3
-
+
%X = getelementptr i8, i8* %p, i32 4
%Y = load i8, i8* %X
br label %loop
@@ -496,17 +581,14 @@ loop:
%i = phi i32 [4, %entry], [192, %loop]
%X2 = getelementptr i8, i8* %p, i32 %i
%Y2 = load i8, i8* %X2
-
-; CHECK: loop:
-; CHECK-NEXT: %Y2 = phi i8 [ %Y, %entry ], [ 0, %loop ]
-; CHECK-NOT: load i8
-
+
+
%cond = call i1 @cond2()
%Z = bitcast i8 *%X3 to i32*
store i32 0, i32* %Z
br i1 %cond, label %loop, label %out
-
+
out:
%R = add i8 %Y, %Y2
ret i8 %R
@@ -514,11 +596,34 @@ out:
define i8 @phi_trans5(i8* %p) {
; CHECK-LABEL: @phi_trans5(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[X4:%.*]] = getelementptr i8, i8* [[P:%.*]], i32 2
+; CHECK-NEXT: store i8 19, i8* [[X4]], align 1
+; CHECK-NEXT: [[X:%.*]] = getelementptr i8, i8* [[P]], i32 4
+; CHECK-NEXT: [[Y:%.*]] = load i8, i8* [[X]], align 1
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[Y2:%.*]] = phi i8 [ [[Y]], [[ENTRY:%.*]] ], [ [[Y2_PRE:%.*]], [[CONT:%.*]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 4, [[ENTRY]] ], [ 3, [[CONT]] ]
+; CHECK-NEXT: [[X2:%.*]] = getelementptr i8, i8* [[P]], i32 [[I]]
+; CHECK-NEXT: [[COND:%.*]] = call i1 @cond2()
+; CHECK-NEXT: br i1 [[COND]], label [[CONT]], label [[OUT:%.*]]
+; CHECK: cont:
+; CHECK-NEXT: [[Z:%.*]] = getelementptr i8, i8* [[X2]], i32 -1
+; CHECK-NEXT: [[Z2:%.*]] = bitcast i8* [[Z]] to i32*
+; CHECK-NEXT: store i32 50462976, i32* [[Z2]], align 4
+; CHECK-NEXT: [[X2_PHI_TRANS_INSERT:%.*]] = getelementptr i8, i8* [[P]], i32 3
+; CHECK-NEXT: [[Y2_PRE]] = load i8, i8* [[X2_PHI_TRANS_INSERT]], align 1
+; CHECK-NEXT: br label [[LOOP]]
+; CHECK: out:
+; CHECK-NEXT: [[R:%.*]] = add i8 [[Y]], [[Y2]]
+; CHECK-NEXT: ret i8 [[R]]
+;
entry:
-
+
%X4 = getelementptr i8, i8* %p, i32 2
store i8 19, i8* %X4
-
+
%X = getelementptr i8, i8* %p, i32 4
%Y = load i8, i8* %X
br label %loop
@@ -536,11 +641,8 @@ cont:
store i32 50462976, i32* %Z2 ;; (1 << 8) | (2 << 16) | (3 << 24)
-; CHECK: store i32
-; CHECK-NEXT: getelementptr i8, i8* %p, i32 3
-; CHECK-NEXT: load i8, i8*
br label %loop
-
+
out:
%R = add i8 %Y, %Y2
ret i8 %R
@@ -552,23 +654,24 @@ declare void @use_i32(i32) readonly
; into header. Make sure we translate the address for %l1 correctly where
; parts of the address computations are in
diff erent basic blocks.
define i32 @phi_trans6(i32* noalias nocapture readonly %x, i1 %cond) {
-; CHECK-LABEL: define i32 @phi_trans6(
-; CHECK-LABEL: entry:
-; CHECK-NEXT: %l0 = load i32, i32* %x
-;
-; CHECK-LABEL: header:
-; CHECK-NEXT: %l1 = phi i32 [ %l0, %entry ], [ %l1.pre, %latch.header_crit_edge ]
-; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.next, %latch.header_crit_edge ]
-; CHECK-NEXT: indirectbr i8* blockaddress(@phi_trans6, %latch), [label %latch]
-;
-; CHECK-LABEL: latch:
-; CHECK-NEXT: %iv.next = add i32 %iv, 1
-; CHECK-NEXT: br i1 %cond, label %exit, label %latch.header_crit_edge
-;
-; CHECK-LABEL: latch.header_crit_edge:
-; CHECK-NEXT: %gep.1.phi.trans.insert.phi.trans.insert = getelementptr i32, i32* %x, i32 %iv.next
-; CHECK-NEXT: %l1.pre = load i32, i32* %gep.1.phi.trans.insert.phi.trans.insert
-; CHECK-LABEL: br label %header
+; CHECK-LABEL: @phi_trans6(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[L0:%.*]] = load i32, i32* [[X:%.*]], align 4
+; CHECK-NEXT: call void @use_i32(i32 [[L0]])
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[L1:%.*]] = phi i32 [ [[L0]], [[ENTRY:%.*]] ], [ [[L1_PRE:%.*]], [[LATCH_HEADER_CRIT_EDGE:%.*]] ]
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[IV_NEXT:%.*]], [[LATCH_HEADER_CRIT_EDGE]] ]
+; CHECK-NEXT: indirectbr i8* blockaddress(@phi_trans6, [[LATCH:%.*]]), [label %latch]
+; CHECK: latch:
+; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
+; CHECK-NEXT: br i1 [[COND:%.*]], label [[EXIT:%.*]], label [[LATCH_HEADER_CRIT_EDGE]]
+; CHECK: latch.header_crit_edge:
+; CHECK-NEXT: [[GEP_1_PHI_TRANS_INSERT_PHI_TRANS_INSERT:%.*]] = getelementptr i32, i32* [[X]], i32 [[IV_NEXT]]
+; CHECK-NEXT: [[L1_PRE]] = load i32, i32* [[GEP_1_PHI_TRANS_INSERT_PHI_TRANS_INSERT]], align 4
+; CHECK-NEXT: br label [[HEADER]]
+; CHECK: exit:
+; CHECK-NEXT: ret i32 [[L1]]
;
entry:
%l0 = load i32, i32* %x
@@ -591,23 +694,24 @@ exit:
; FIXME: Currently we fail to translate the PHI in this case.
define i32 @phi_trans7(i32* noalias nocapture readonly %x, i1 %cond) {
-; CHECK-LABEL: define i32 @phi_trans7(
-; CHECK-LABEL: entry:
-; CHECK-NEXT: %l0 = load i32, i32* %x
-;
-; CHECK-LABEL: header:
-; CHECK-NEXT: %iv = phi i32 [ 2, %entry ], [ %iv.next, %latch.header_crit_edge ]
-; CHECK-NEXT: %offset = add i32 %iv, -2
-; CHECK-NEXT: indirectbr i8* blockaddress(@phi_trans7, %latch), [label %latch]
-;
-; CHECK-LABEL: latch:
-; CHECK-NEXT: %gep.1 = getelementptr i32, i32* %x, i32 %offset
-; CHECK-NEXT: %l1 = load i32, i32* %gep.1
-; CHECK-NEXT: %iv.next = add i32 %iv, 1
-; CHECK-NEXT: br i1 %cond, label %exit, label %latch.header_crit_edge
-;
-; CHECK-LABEL: latch.header_crit_edge:
-; CHECK-LABEL: br label %header
+; CHECK-LABEL: @phi_trans7(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[L0:%.*]] = load i32, i32* [[X:%.*]], align 4
+; CHECK-NEXT: call void @use_i32(i32 [[L0]])
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 2, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LATCH_HEADER_CRIT_EDGE:%.*]] ]
+; CHECK-NEXT: [[OFFSET:%.*]] = add i32 [[IV]], -2
+; CHECK-NEXT: indirectbr i8* blockaddress(@phi_trans7, [[LATCH:%.*]]), [label %latch]
+; CHECK: latch:
+; CHECK-NEXT: [[GEP_1:%.*]] = getelementptr i32, i32* [[X]], i32 [[OFFSET]]
+; CHECK-NEXT: [[L1:%.*]] = load i32, i32* [[GEP_1]], align 4
+; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
+; CHECK-NEXT: br i1 [[COND:%.*]], label [[EXIT:%.*]], label [[LATCH_HEADER_CRIT_EDGE]]
+; CHECK: latch.header_crit_edge:
+; CHECK-NEXT: br label [[HEADER]]
+; CHECK: exit:
+; CHECK-NEXT: ret i32 [[L1]]
;
entry:
%l0 = load i32, i32* %x
@@ -631,23 +735,24 @@ exit:
; FIXME: Currently we fail to translate the PHI in this case.
define i32 @phi_trans8(i32* noalias nocapture readonly %x, i1 %cond) {
-; CHECK-LABEL: define i32 @phi_trans8(
-; CHECK-LABEL: entry:
-; CHECK-NEXT: %l0 = load i32, i32* %x
-;
-; CHECK-LABEL: header:
-; CHECK-NEXT: %iv = phi i32 [ 2, %entry ], [ %iv.next, %latch.header_crit_edge ]
-; CHECK-NEXT: indirectbr i8* blockaddress(@phi_trans8, %latch), [label %latch]
-;
-; CHECK-LABEL: latch:
-; CHECK-NEXT: %offset = add i32 %iv, -2
-; CHECK-NEXT: %gep.1 = getelementptr i32, i32* %x, i32 %offset
-; CHECK-NEXT: %l1 = load i32, i32* %gep.1
-; CHECK-NEXT: %iv.next = add i32 %iv, 1
-; CHECK-NEXT: br i1 %cond, label %exit, label %latch.header_crit_edge
-;
-; CHECK-LABEL: latch.header_crit_edge:
-; CHECK-LABEL: br label %header
+; CHECK-LABEL: @phi_trans8(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[L0:%.*]] = load i32, i32* [[X:%.*]], align 4
+; CHECK-NEXT: call void @use_i32(i32 [[L0]])
+; CHECK-NEXT: br label [[HEADER:%.*]]
+; CHECK: header:
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 2, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LATCH_HEADER_CRIT_EDGE:%.*]] ]
+; CHECK-NEXT: indirectbr i8* blockaddress(@phi_trans8, [[LATCH:%.*]]), [label %latch]
+; CHECK: latch:
+; CHECK-NEXT: [[OFFSET:%.*]] = add i32 [[IV]], -2
+; CHECK-NEXT: [[GEP_1:%.*]] = getelementptr i32, i32* [[X]], i32 [[OFFSET]]
+; CHECK-NEXT: [[L1:%.*]] = load i32, i32* [[GEP_1]], align 4
+; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
+; CHECK-NEXT: br i1 [[COND:%.*]], label [[EXIT:%.*]], label [[LATCH_HEADER_CRIT_EDGE]]
+; CHECK: latch.header_crit_edge:
+; CHECK-NEXT: br label [[HEADER]]
+; CHECK: exit:
+; CHECK-NEXT: ret i32 [[L1]]
;
entry:
%l0 = load i32, i32* %x
@@ -673,6 +778,13 @@ exit:
; PR6642
define i32 @memset_to_load() nounwind readnone {
+; CHECK-LABEL: @memset_to_load(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[X:%.*]] = alloca [256 x i32], align 4
+; CHECK-NEXT: [[TMP:%.*]] = bitcast [256 x i32]* [[X]] to i8*
+; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[TMP]], i8 0, i64 1024, i1 false)
+; CHECK-NEXT: ret i32 0
+;
entry:
%x = alloca [256 x i32], align 4 ; <[256 x i32]*> [#uses=2]
%tmp = bitcast [256 x i32]* %x to i8* ; <i8*> [#uses=1]
@@ -680,8 +792,6 @@ entry:
%arraydecay = getelementptr inbounds [256 x i32], [256 x i32]* %x, i32 0, i32 0 ; <i32*>
%tmp1 = load i32, i32* %arraydecay ; <i32> [#uses=1]
ret i32 %tmp1
-; CHECK-LABEL: @memset_to_load(
-; CHECK: ret i32 0
}
@@ -690,6 +800,16 @@ entry:
;;===----------------------------------------------------------------------===;;
define i32 @load_load_partial_alias(i8* %P) nounwind ssp {
+; CHECK-LABEL: @load_load_partial_alias(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[P:%.*]] to i32*
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4
+; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[P]], i64 1
+; CHECK-NEXT: [[TMP5:%.*]] = load i8, i8* [[ADD_PTR]], align 1
+; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[TMP5]] to i32
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], [[CONV]]
+; CHECK-NEXT: ret i32 [[ADD]]
+;
entry:
%0 = bitcast i8* %P to i32*
%tmp2 = load i32, i32* %0
@@ -698,20 +818,25 @@ entry:
%conv = zext i8 %tmp5 to i32
%add = add nsw i32 %tmp2, %conv
ret i32 %add
-
-; TEMPORARILYDISABLED-LABEL: @load_load_partial_alias(
-; TEMPORARILYDISABLED: load i32, i32*
-; TEMPORARILYDISABLED-NOT: load
-; TEMPORARILYDISABLED: lshr i32 {{.*}}, 8
-; TEMPORARILYDISABLED-NOT: load
-; TEMPORARILYDISABLED: trunc i32 {{.*}} to i8
-; TEMPORARILYDISABLED-NOT: load
-; TEMPORARILYDISABLED: ret i32
}
; Cross block partial alias case.
define i32 @load_load_partial_alias_cross_block(i8* %P) nounwind ssp {
+; CHECK-LABEL: @load_load_partial_alias_cross_block(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[XX:%.*]] = bitcast i8* [[P:%.*]] to i32*
+; CHECK-NEXT: [[X1:%.*]] = load i32, i32* [[XX]], align 4
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X1]], 127
+; CHECK-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[IF_END:%.*]]
+; CHECK: land.lhs.true:
+; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i8, i8* [[P]], i64 1
+; CHECK-NEXT: [[TMP5:%.*]] = load i8, i8* [[ARRAYIDX4]], align 1
+; CHECK-NEXT: [[CONV6:%.*]] = zext i8 [[TMP5]] to i32
+; CHECK-NEXT: ret i32 [[CONV6]]
+; CHECK: if.end:
+; CHECK-NEXT: ret i32 52
+;
entry:
%xx = bitcast i8* %P to i32*
%x1 = load i32, i32* %xx, align 4
@@ -726,10 +851,6 @@ land.lhs.true: ; preds = %entry
if.end:
ret i32 52
-; TEMPORARILY_DISABLED-LABEL: @load_load_partial_alias_cross_block(
-; TEMPORARILY_DISABLED: land.lhs.true:
-; TEMPORARILY_DISABLED-NOT: load i8
-; TEMPORARILY_DISABLED: ret i32 %conv6
}
@@ -743,6 +864,15 @@ if.end:
@f = global %widening1 zeroinitializer, align 4
define i32 @test_widening1(i8* %P) nounwind ssp noredzone {
+; CHECK-LABEL: @test_widening1(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP:%.*]] = load i8, i8* getelementptr inbounds ([[WIDENING1:%.*]], %widening1* @f, i64 0, i32 1), align 4
+; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[TMP]] to i32
+; CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* getelementptr inbounds ([[WIDENING1]], %widening1* @f, i64 0, i32 2), align 1
+; CHECK-NEXT: [[CONV2:%.*]] = zext i8 [[TMP1]] to i32
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]]
+; CHECK-NEXT: ret i32 [[ADD]]
+;
entry:
%tmp = load i8, i8* getelementptr inbounds (%widening1, %widening1* @f, i64 0, i32 1), align 4
%conv = zext i8 %tmp to i32
@@ -750,15 +880,24 @@ entry:
%conv2 = zext i8 %tmp1 to i32
%add = add nsw i32 %conv, %conv2
ret i32 %add
-; CHECK-LABEL: @test_widening1(
-; CHECK-NOT: load
-; CHECK: load i8, i8*
-; CHECK: load i8, i8*
-; CHECK-NOT: load
-; CHECK: ret i32
}
define i32 @test_widening2() nounwind ssp noredzone {
+; CHECK-LABEL: @test_widening2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP:%.*]] = load i8, i8* getelementptr inbounds ([[WIDENING1:%.*]], %widening1* @f, i64 0, i32 1), align 4
+; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[TMP]] to i32
+; CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* getelementptr inbounds ([[WIDENING1]], %widening1* @f, i64 0, i32 2), align 1
+; CHECK-NEXT: [[CONV2:%.*]] = zext i8 [[TMP1]] to i32
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]]
+; CHECK-NEXT: [[TMP2:%.*]] = load i8, i8* getelementptr inbounds ([[WIDENING1]], %widening1* @f, i64 0, i32 3), align 2
+; CHECK-NEXT: [[CONV3:%.*]] = zext i8 [[TMP2]] to i32
+; CHECK-NEXT: [[ADD2:%.*]] = add nsw i32 [[ADD]], [[CONV3]]
+; CHECK-NEXT: [[TMP3:%.*]] = load i8, i8* getelementptr inbounds ([[WIDENING1]], %widening1* @f, i64 0, i32 4), align 1
+; CHECK-NEXT: [[CONV4:%.*]] = zext i8 [[TMP3]] to i32
+; CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[ADD2]], [[CONV4]]
+; CHECK-NEXT: ret i32 [[ADD3]]
+;
entry:
%tmp = load i8, i8* getelementptr inbounds (%widening1, %widening1* @f, i64 0, i32 1), align 4
%conv = zext i8 %tmp to i32
@@ -775,14 +914,6 @@ entry:
%add3 = add nsw i32 %add2, %conv4
ret i32 %add3
-; CHECK-LABEL: @test_widening2(
-; CHECK-NOT: load
-; CHECK: load i8, i8*
-; CHECK: load i8, i8*
-; CHECK: load i8, i8*
-; CHECK: load i8, i8*
-; CHECK-NOT: load
-; CHECK: ret i32
}
@@ -807,13 +938,17 @@ declare void @use3(i8***, i8**)
; PR8908
define void @test_escape1() nounwind {
+; CHECK-LABEL: @test_escape1(
+; CHECK-NEXT: [[X:%.*]] = alloca i8**, align 8
+; CHECK-NEXT: store i8** getelementptr inbounds ([5 x i8*], [5 x i8*]* @_ZTV1X, i64 0, i64 2), i8*** [[X]], align 8
+; CHECK-NEXT: call void @use() #[[ATTR6]]
+; CHECK-NEXT: call void @use3(i8*** [[X]], i8** getelementptr inbounds ([5 x i8*], [5 x i8*]* @_ZTV1X, i64 0, i64 2)) #[[ATTR6]]
+; CHECK-NEXT: ret void
+;
%x = alloca i8**, align 8
store i8** getelementptr inbounds ([5 x i8*], [5 x i8*]* @_ZTV1X, i64 0, i64 2), i8*** %x, align 8
call void @use() nounwind
%DEAD = load i8**, i8*** %x, align 8
call void @use3(i8*** %x, i8** %DEAD) nounwind
ret void
-; CHECK: test_escape1
-; CHECK-NOT: DEAD
-; CHECK: ret
}
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