[PATCH] D100370: [AArch64][SVE] Fix bug in lowering of fixed-length integer vector divides

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm accepted this revision.
paulwalker-arm added a comment.
This revision is now accepted and ready to land.

The non-power-of-two RUN lines should be extended to allow maximum testing (see comments) but otherwise looks good.



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Comment at: llvm/test/CodeGen/AArch64/sve-fixed-length-int-div.ll:3
+; RUN: llc -aarch64-sve-vector-bits-min=256  -asm-verbose=0 < %s | FileCheck %s -check-prefixes=CHECK,VBITS_EQ_256
+; RUN: llc -aarch64-sve-vector-bits-min=384  -asm-verbose=0 < %s | FileCheck %s
+; RUN: llc -aarch64-sve-vector-bits-min=512  -asm-verbose=0 < %s | FileCheck %s -check-prefixes=CHECK,VBITS_GE_512,VBITS_EQ_512
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This is missing `-check-prefixes=CHECK,VBITS_EQ_256`.  Actually this is a universal comment, in that all the RUN lines with `vector-bits-min=512-896` should include `VBITS_EQ_512`, `vector-bits-min=1024-1920` should include `VBITS_EQ_1024`.


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Comment at: llvm/test/CodeGen/AArch64/sve-fixed-length-int-rem.ll:3
+; RUN: llc -aarch64-sve-vector-bits-min=256  -asm-verbose=0 < %s | FileCheck %s -check-prefixes=CHECK,VBITS_EQ_256
+; RUN: llc -aarch64-sve-vector-bits-min=384  -asm-verbose=0 < %s | FileCheck %s
+; RUN: llc -aarch64-sve-vector-bits-min=512  -asm-verbose=0 < %s | FileCheck %s -check-prefixes=CHECK,VBITS_GE_512,VBITS_EQ_512
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Same missing `VBITS_EQ_###` comment as with div tests.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100370/new/

https://reviews.llvm.org/D100370