[PATCH] D100996: [AArch64] Fix for BTI landing pad insertion with PAC-RET+bkey.
Daniel Kiss via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 21 14:22:34 PDT 2021
danielkiss updated this revision to Diff 339379.
danielkiss edited the summary of this revision.
danielkiss added a comment.
Ah, right. EMITBKEY should be a meta one but it seems as a problematic change.
Let's simplify this now and hope no other need to be added too.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D100996/new/
https://reviews.llvm.org/D100996
Files:
llvm/lib/Target/AArch64/AArch64BranchTargets.cpp
llvm/test/CodeGen/AArch64/sign-return-address.ll
Index: llvm/test/CodeGen/AArch64/sign-return-address.ll
===================================================================
--- llvm/test/CodeGen/AArch64/sign-return-address.ll
+++ llvm/test/CodeGen/AArch64/sign-return-address.ll
@@ -122,3 +122,33 @@
define i32 @leaf_sign_all_v83_b_key(i32 %x) "sign-return-address"="all" "target-features"="+v8.3a" "sign-return-address-key"="b_key" {
ret i32 %x
}
+
+; CHECK-LABEL: @leaf_sign_all_a_key_bti
+; CHECK-NOT: hint #34
+; CHECK: hint #25
+; CHECK: hint #29
+; CHECK-V83A: paciasp
+; CHECK-V83A: retaa
+define i32 @leaf_sign_all_a_key_bti(i32 %x) "sign-return-address"="all" "sign-return-address-key"="a_key" "branch-target-enforcement"="true"{
+ ret i32 %x
+}
+
+; CHECK-LABEL: @leaf_sign_all_b_key_bti
+; CHECK-NOT: hint #34
+; CHECK: hint #27
+; CHECK: hint #31
+; CHECK-V83A: pacibsp
+; CHECK-V83A: retab
+define i32 @leaf_sign_all_b_key_bti(i32 %x) "sign-return-address"="all" "sign-return-address-key"="b_key" "branch-target-enforcement"="true"{
+ ret i32 %x
+}
+
+; CHECK-LABEL: @leaf_sign_all_v83_b_key_bti
+; CHECK-NOT: hint #34
+; CHECK: pacibsp
+; CHECK-NOT: ret
+; CHECK: retab
+; CHECK-NOT: ret
+define i32 @leaf_sign_all_v83_b_key_bti(i32 %x) "sign-return-address"="all" "target-features"="+v8.3a" "sign-return-address-key"="b_key" "branch-target-enforcement"="true" {
+ ret i32 %x
+}
Index: llvm/lib/Target/AArch64/AArch64BranchTargets.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64BranchTargets.cpp
+++ llvm/lib/Target/AArch64/AArch64BranchTargets.cpp
@@ -121,8 +121,10 @@
auto MBBI = MBB.begin();
- // Skip the meta instuctions, those will be removed anyway.
- for (; MBBI != MBB.end() && MBBI->isMetaInstruction(); ++MBBI)
+ // Skip the meta instructions, those will be removed anyway.
+ for (; MBBI != MBB.end() &&
+ (MBBI->isMetaInstruction() || MBBI->getOpcode() == AArch64::EMITBKEY);
+ ++MBBI)
;
// SCTLR_EL1.BT[01] is set to 0 by default which means
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