[PATCH] D100963: [AArch64] Revert "Prevent hoisting fmul from THEN/ELSE to IF if there is fmsub/fmadd opportunity."

[Sebastian Pop via Phabricator via llvm-commits]

sebpop created this revision.
sebpop added reviewers: eli.friedman, hulx2000, mcrosier, hfinkel, fhahn.
Herald added subscribers: danielkiss, hiraditya, kristof.beyls.
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This reverts commit 543900539f7c166d453e5bd5175f9461dbbd4319.

As explained in https://reviews.llvm.org/D7299 this patch causes missed optimizations:
it disables simplifyCFG from hoisting fmul even when all uses of the multiply could be hoisted.

The side-effects of the patch do not justify the original motivation for the change:
"improved spec2006/soplex by 2% consistently on cortex-a57 core"

One example where this change is harmful is https://github.com/ispc/ispc/issues/2052
where ISPC generates similar code on both branches and relies on simplifyCFG to remove the branch.
The branch is removed only after the arm64 back-end pairs fmul+fadd
and after that, there are not enough scalar optimizations to clean up the code.

A better solution is to make instruction selection work on multiple basic-blocks
such that it can decide to sink and fuse multiplies to form FMAs.

Tested on arm64-linux.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D100963

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/test/Transforms/SimplifyCFG/AArch64/prefer-fma.ll

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