[PATCH] D97503: [AIX] Allow safe for 32bit P9 VSX extract and insert pattern matches

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai added inline comments.


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Comment at: llvm/lib/Target/PowerPC/PPCInstrVSX.td:4159
 }
+} //HasVSX, HasP9Vector, IsBigEndian
+
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This doesn't match the actual predicates for this block (i.e. doesn't match line 4095).


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Comment at: llvm/lib/Target/PowerPC/PPCInstrVSX.td:4162
+// Big endian 64Bit Power9 subtarget.
+let Predicates = [HasVSX, HasP9Vector, IsBigEndian, IsPPC64] in {
+def : Pat<(v2i64 (scalar_to_vector (i64 (load iaddrX4:$src)))),
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Why do we start another block here that is exactly the same set of predicates as line 4095?


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Comment at: llvm/test/CodeGen/PowerPC/aix-insert-extract.ll:1
+; RUN: llc -mcpu=pwr9 -mtriple=powerpc64-ibm-aix-xcoff -vec-extabi \
+; RUN:   -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK-64
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Please use the script to produce the CHECK directives.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D97503/new/

https://reviews.llvm.org/D97503