[PATCH] D100932: [RISCV] CleanupVSETVLI: Add phase to remove redundant VSETVLI instructions across basic blocks

[ShihPo Hung via Phabricator via llvm-commits]

arcbbb created this revision.
arcbbb added reviewers: fpallares, rogfer01, frasercrmck, craig.topper, evandro, HsiangKai, khchen.
Herald added subscribers: vkmr, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, hiraditya.
arcbbb requested review of this revision.
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This is a rework from @fpallares's and @rogfer01's patches from BSC.

This patch removes the first VSET[I]VLI from a basic block 
when its config is equal to the VL & VType of predecessors.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D100932

Files:
  llvm/lib/Target/RISCV/RISCVCleanupVSETVLI.cpp
  llvm/lib/Target/RISCV/RISCVCleanupVSETVLI.h
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll

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