[llvm] a2099d6 - [InstCombine] add tests for srem-by-2; NFC

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 20 14:10:24 PDT 2021


Author: Sanjay Patel
Date: 2021-04-20T17:10:16-04:00
New Revision: a2099d6542b978ae7c604e7d3012f9f00054a859

URL: https://github.com/llvm/llvm-project/commit/a2099d6542b978ae7c604e7d3012f9f00054a859
DIFF: https://github.com/llvm/llvm-project/commit/a2099d6542b978ae7c604e7d3012f9f00054a859.diff

LOG: [InstCombine] add tests for srem-by-2; NFC

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/lshr.ll
    llvm/test/Transforms/InstCombine/rem.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/lshr.ll b/llvm/test/Transforms/InstCombine/lshr.ll
index bc9bd9262ccd..9311f68e808d 100644
--- a/llvm/test/Transforms/InstCombine/lshr.ll
+++ b/llvm/test/Transforms/InstCombine/lshr.ll
@@ -325,3 +325,60 @@ define i32 @mul_splat_fold_no_nuw(i32 %x) {
   %t = lshr i32 %m, 16
   ret i32 %t
 }
+
+define i32 @negative_and_odd(i32 %x) {
+; CHECK-LABEL: @negative_and_odd(
+; CHECK-NEXT:    [[S:%.*]] = srem i32 [[X:%.*]], 2
+; CHECK-NEXT:    [[R:%.*]] = lshr i32 [[S]], 31
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %s = srem i32 %x, 2
+  %r = lshr i32 %s, 31
+  ret i32 %r
+}
+
+define <2 x i7> @negative_and_odd_vec(<2 x i7> %x) {
+; CHECK-LABEL: @negative_and_odd_vec(
+; CHECK-NEXT:    [[S:%.*]] = srem <2 x i7> [[X:%.*]], <i7 2, i7 2>
+; CHECK-NEXT:    [[R:%.*]] = lshr <2 x i7> [[S]], <i7 6, i7 6>
+; CHECK-NEXT:    ret <2 x i7> [[R]]
+;
+  %s = srem <2 x i7> %x, <i7 2, i7 2>
+  %r = lshr <2 x i7> %s, <i7 6, i7 6>
+  ret <2 x i7> %r
+}
+
+define i32 @negative_and_odd_uses(i32 %x, i32* %p) {
+; CHECK-LABEL: @negative_and_odd_uses(
+; CHECK-NEXT:    [[S:%.*]] = srem i32 [[X:%.*]], 2
+; CHECK-NEXT:    store i32 [[S]], i32* [[P:%.*]], align 4
+; CHECK-NEXT:    [[R:%.*]] = lshr i32 [[S]], 31
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %s = srem i32 %x, 2
+  store i32 %s, i32* %p
+  %r = lshr i32 %s, 31
+  ret i32 %r
+}
+
+define i32 @srem3(i32 %x) {
+; CHECK-LABEL: @srem3(
+; CHECK-NEXT:    [[S:%.*]] = srem i32 [[X:%.*]], 3
+; CHECK-NEXT:    [[R:%.*]] = lshr i32 [[S]], 31
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %s = srem i32 %x, 3
+  %r = lshr i32 %s, 31
+  ret i32 %r
+}
+
+define i32 @srem2_lshr30(i32 %x) {
+; CHECK-LABEL: @srem2_lshr30(
+; CHECK-NEXT:    [[S:%.*]] = srem i32 [[X:%.*]], 2
+; CHECK-NEXT:    [[R:%.*]] = lshr i32 [[S]], 30
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %s = srem i32 %x, 2
+  %r = lshr i32 %s, 30
+  ret i32 %r
+}

diff  --git a/llvm/test/Transforms/InstCombine/rem.ll b/llvm/test/Transforms/InstCombine/rem.ll
index 8f0172e95212..2a75984b2231 100644
--- a/llvm/test/Transforms/InstCombine/rem.ll
+++ b/llvm/test/Transforms/InstCombine/rem.ll
@@ -738,6 +738,28 @@ define i1 @test28(i32 %A) {
   ret i1 %C
 }
 
+define i1 @positive_and_odd(i32 %A) {
+; CHECK-LABEL: @positive_and_odd(
+; CHECK-NEXT:    [[B:%.*]] = srem i32 [[A:%.*]], 2
+; CHECK-NEXT:    [[C:%.*]] = icmp eq i32 [[B]], 1
+; CHECK-NEXT:    ret i1 [[C]]
+;
+  %B = srem i32 %A, 2
+  %C = icmp eq i32 %B, 1
+  ret i1 %C
+}
+
+define i1 @negative_and_odd(i32 %A) {
+; CHECK-LABEL: @negative_and_odd(
+; CHECK-NEXT:    [[B:%.*]] = srem i32 [[A:%.*]], 2
+; CHECK-NEXT:    [[C:%.*]] = icmp eq i32 [[B]], -1
+; CHECK-NEXT:    ret i1 [[C]]
+;
+  %B = srem i32 %A, 2
+  %C = icmp eq i32 %B, -1
+  ret i1 %C
+}
+
 ; FP division-by-zero is not UB.
 
 define double @PR34870(i1 %cond, double %x, double %y) {


        


More information about the llvm-commits mailing list