[PATCH] D100245: [ARM] Expand VMOVRRD simplification pattern

Dave Green via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 20 10:20:53 PDT 2021


dmgreen added inline comments.


================
Comment at: llvm/test/CodeGen/ARM/dagcombine-anyexttozeroext.ll:47
 ; CHECK-NEXT:    vmovl.u8 q8, d16
-; CHECK-NEXT:    vmovl.u16 q8, d16
-; CHECK-NEXT:    vmov r0, r1, d16
-; CHECK-NEXT:    vmov r2, r3, d17
+; CHECK-NEXT:    vmov.u16 r0, d16[0]
+; CHECK-NEXT:    vmov.u16 r1, d16[1]
----------------
SjoerdMeijer wrote:
> dmgreen wrote:
> > This is a bit unfortunate, but if you run the code through opt it is already simplified to a single zext, which still becomes a vmovl; vmovl pair
> Just for my understanding, what does that mean? Is this something we have to live with, or can we fix this regression?
I don't think it's a real regressions. The mid-end of llvm will have turned it into other code already, which we already optimize to the pair of vmovl's. The test has a lot of inserts and extract's which are unlikely to come up in reality.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100245/new/

https://reviews.llvm.org/D100245



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